Commit 9a4c4850 authored by Sean Christopherson's avatar Sean Christopherson Committed by Paolo Bonzini
Browse files

KVM: VMX: Passthrough MSR_IA32_PRED_CMD based purely on host+guest CPUID 



Passthrough MSR_IA32_PRED_CMD based purely on whether or not the MSR is
supported and enabled, i.e. don't wait until the first write.  There's no
benefit to deferred passthrough, and the extra logic only adds complexity.

Signed-off-by: default avatarSean Christopherson <seanjc@google.com>
Reviewed-by: default avatarXiaoyao Li <xiaoyao.li@intel.com>
Message-Id: <20230322011440.2195485-3-seanjc@google.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent 52887af5

arch/x86/kvm/vmx/vmx.c

+3 −13
Original line number Diff line number Diff line
@@ -2298,19 +2298,6 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) 
			break;



		wrmsrl(MSR_IA32_PRED_CMD, PRED_CMD_IBPB);



		/*

		 * For non-nested:

		 * When it's written (to non-zero) for the first time, pass

		 * it through.

		 *

		 * For nested:

		 * The handling of the MSR bitmap for L2 guests is done in

		 * nested_vmx_prepare_msr_bitmap. We should not touch the

		 * vmcs02.msr_bitmap here since it gets completely overwritten

		 * in the merging.

		 */

		vmx_disable_intercept_for_msr(vcpu, MSR_IA32_PRED_CMD, MSR_TYPE_W);

		break;

	case MSR_IA32_CR_PAT:

		if (!kvm_pat_valid(data))
@@ -7743,6 +7730,9 @@ static void vmx_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu) 
		vmx_set_intercept_for_msr(vcpu, MSR_IA32_XFD_ERR, MSR_TYPE_R,

					  !guest_cpuid_has(vcpu, X86_FEATURE_XFD));



	if (boot_cpu_has(X86_FEATURE_IBPB))

		vmx_set_intercept_for_msr(vcpu, MSR_IA32_PRED_CMD, MSR_TYPE_W,

					  !guest_has_pred_cmd_msr(vcpu));



	set_cr4_guest_host_mask(vmx);