Commit 99d173fb authored by Aswath Govindraju's avatar Aswath Govindraju Committed by Marc Kleine-Budde
Browse files

can: m_can: fix iomap_read_fifo() and iomap_write_fifo() 

The read and writes from the fifo are from a buffer, with various
fields and data at predefined offsets. So, they should not be done to
the same address(or port) in case of val_count greater than 1.
Therefore, fix this by using iowrite32()/ioread32() instead of
ioread32_rep()/iowrite32_rep().

Also, the write into FIFO must be performed with an offset from the
message ram base address. Therefore, fix the base address to
mram_base.

Fixes: e3938177 ("can: m_can: Disable IRQs on FIFO bus errors")
Link: https://lore.kernel.org/all/20210920123344.2320-1-a-govindraju@ti.com


Signed-off-by: default avatarAswath Govindraju <a-govindraju@ti.com>
Signed-off-by: default avatarMarc Kleine-Budde <mkl@pengutronix.de>
parent f7c05c39

drivers/net/can/m_can/m_can_platform.c

+12 −2
Original line number Diff line number Diff line
@@ -32,8 +32,13 @@ static u32 iomap_read_reg(struct m_can_classdev *cdev, int reg) 
static int iomap_read_fifo(struct m_can_classdev *cdev, int offset, void *val, size_t val_count)

{

	struct m_can_plat_priv *priv = cdev_to_priv(cdev);

	void __iomem *src = priv->mram_base + offset;



	ioread32_rep(priv->mram_base + offset, val, val_count);

	while (val_count--) {

		*(unsigned int *)val = ioread32(src);

		val += 4;

		src += 4;

	}



	return 0;

}
@@ -51,8 +56,13 @@ static int iomap_write_fifo(struct m_can_classdev *cdev, int offset, 
			    const void *val, size_t val_count)

{

	struct m_can_plat_priv *priv = cdev_to_priv(cdev);

	void __iomem *dst = priv->mram_base + offset;



	iowrite32_rep(priv->base + offset, val, val_count);

	while (val_count--) {

		iowrite32(*(unsigned int *)val, dst);

		val += 4;

		dst += 4;

	}



	return 0;

}