Commit 99ca0edb authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux 

Pull arm64 updates from Will Deacon:

 - vDSO build improvements including support for building with BSD.

 - Cleanup to the AMU support code and initialisation rework to support
   cpufreq drivers built as modules.

 - Removal of synthetic frame record from exception stack when entering
   the kernel from EL0.

 - Add support for the TRNG firmware call introduced by Arm spec
   DEN0098.

 - Cleanup and refactoring across the board.

 - Avoid calling arch_get_random_seed_long() from
   add_interrupt_randomness()

 - Perf and PMU updates including support for Cortex-A78 and the v8.3
   SPE extensions.

 - Significant steps along the road to leaving the MMU enabled during
   kexec relocation.

 - Faultaround changes to initialise prefaulted PTEs as 'old' when
   hardware access-flag updates are supported, which drastically
   improves vmscan performance.

 - CPU errata updates for Cortex-A76 (#1463225) and Cortex-A55
   (#1024718)

 - Preparatory work for yielding the vector unit at a finer granularity
   in the crypto code, which in turn will one day allow us to defer
   softirq processing when it is in use.

 - Support for overriding CPU ID register fields on the command-line.

* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (85 commits)
  drivers/perf: Replace spin_lock_irqsave to spin_lock
  mm: filemap: Fix microblaze build failure with 'mmu_defconfig'
  arm64: Make CPU_BIG_ENDIAN depend on ld.bfd or ld.lld 13.0.0+
  arm64: cpufeatures: Allow disabling of Pointer Auth from the command-line
  arm64: Defer enabling pointer authentication on boot core
  arm64: cpufeatures: Allow disabling of BTI from the command-line
  arm64: Move "nokaslr" over to the early cpufeature infrastructure
  KVM: arm64: Document HVC_VHE_RESTART stub hypercall
  arm64: Make kvm-arm.mode={nvhe, protected} an alias of id_aa64mmfr1.vh=0
  arm64: Add an aliasing facility for the idreg override
  arm64: Honor VHE being disabled from the command-line
  arm64: Allow ID_AA64MMFR1_EL1.VH to be overridden from the command line
  arm64: cpufeature: Add an early command-line cpufeature override facility
  arm64: Extract early FDT mapping from kaslr_early_init()
  arm64: cpufeature: Use IDreg override in __read_sysreg_by_encoding()
  arm64: cpufeature: Add global feature override facility
  arm64: Move SCTLR_EL1 initialisation to EL-agnostic code
  arm64: Simplify init_el2_state to be non-VHE only
  arm64: Move VHE-specific SPE setup to mutate_to_vhe()
  arm64: Drop early setting of MDSCR_EL2.TPMS
  ...
parents 4a037ad5 1ffa9763

Documentation/admin-guide/kernel-parameters.txt

+9 −0
Original line number Diff line number Diff line
@@ -373,6 +373,12 @@ 
	arcrimi=	[HW,NET] ARCnet - "RIM I" (entirely mem-mapped) cards

			Format: <io>,<irq>,<nodeID>



	arm64.nobti	[ARM64] Unconditionally disable Branch Target

			Identification support



	arm64.nopauth	[ARM64] Unconditionally disable Pointer Authentication

			support



	ataflop=	[HW,M68k]



	atarimouse=	[HW,MOUSE] Atari Mouse
@@ -2252,6 +2258,9 @@ 
	kvm-arm.mode=

			[KVM,ARM] Select one of KVM/arm64's modes of operation.



			nvhe: Standard nVHE-based mode, without support for

			      protected guests.



			protected: nVHE-based mode with support for guests whose

				   state is kept private from the host.

				   Not valid if the kernel is running in EL2.

Documentation/admin-guide/perf/arm-cmn.rst

+1 −1
Original line number Diff line number Diff line
@@ -17,7 +17,7 @@ PMU events 
----------



The PMU driver registers a single PMU device for the whole interconnect,

see /sys/bus/event_source/devices/arm_cmn. Multi-chip systems may link

see /sys/bus/event_source/devices/arm_cmn_0. Multi-chip systems may link

more than one CMN together via external CCIX links - in this situation,

each mesh counts its own events entirely independently, and additional

PMU devices will be named arm_cmn_{1..n}.

Documentation/devicetree/bindings/arm/pmu.yaml

+1 −0
Original line number Diff line number Diff line
@@ -43,6 +43,7 @@ properties: 
          - arm,cortex-a75-pmu

          - arm,cortex-a76-pmu

          - arm,cortex-a77-pmu

          - arm,cortex-a78-pmu

          - arm,neoverse-e1-pmu

          - arm,neoverse-n1-pmu

          - brcm,vulcan-pmu

Documentation/virt/kvm/arm/hyp-abi.rst

+9 −0
Original line number Diff line number Diff line
@@ -58,6 +58,15 @@ these functions (see arch/arm{,64}/include/asm/virt.h): 
  into place (arm64 only), and jump to the restart address while at HYP/EL2.

  This hypercall is not expected to return to its caller.



* ::



    x0 = HVC_VHE_RESTART (arm64 only)



  Attempt to upgrade the kernel's exception level from EL1 to EL2 by enabling

  the VHE mode. This is conditioned by the CPU supporting VHE, the EL2 MMU

  being off, and VHE not being disabled by any other means (command line

  option, for example).



Any other value of r0/x0 triggers a hypervisor-specific handling,

which is not documented here.

arch/arm/include/asm/archrandom.h

0 → 100644
+10 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 */

#ifndef _ASM_ARCHRANDOM_H

#define _ASM_ARCHRANDOM_H



static inline bool __init smccc_probe_trng(void)

{

	return false;

}



#endif /* _ASM_ARCHRANDOM_H */