Commit 99c15019 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdkfd: disable IOMMUv2 support for KV/CZ 



Use the dGPU path instead.  There were a lot of platform
issues with IOMMU in general on these chips due to windows
not enabling IOMMU at the time.  The dGPU path has been
used for a long time with newer APUs and works fine.  This
also paves the way to simplify the driver significantly.

v2: use the dGPU queue manager functions

Reviewed-by: default avatarFelix Kuehling <Felix.Kuehling@amd.com>
Acked-by: default avatarChristian König <christian.koenig@amd.com>
Tested-by: default avatarMike Lothian <mike@fireburn.co.uk>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 95979df2

drivers/gpu/drm/amd/amdkfd/kfd_device.c

+0 −6
Original line number Diff line number Diff line
@@ -233,10 +233,6 @@ static void kfd_device_info_init(struct kfd_dev *kfd, 
		    asic_type != CHIP_TONGA)

			kfd->device_info.supports_cwsr = true;



		if (asic_type == CHIP_KAVERI ||

		    asic_type == CHIP_CARRIZO)

			kfd->device_info.needs_iommu_device = true;



		if (asic_type != CHIP_HAWAII && !vf)

			kfd->device_info.needs_pci_atomics = true;

	}
@@ -249,7 +245,6 @@ struct kfd_dev *kgd2kfd_probe(struct amdgpu_device *adev, bool vf) 
	uint32_t gfx_target_version = 0;



	switch (adev->asic_type) {

#ifdef KFD_SUPPORT_IOMMU_V2

#ifdef CONFIG_DRM_AMDGPU_CIK

	case CHIP_KAVERI:

		gfx_target_version = 70000;
@@ -262,7 +257,6 @@ struct kfd_dev *kgd2kfd_probe(struct amdgpu_device *adev, bool vf) 
		if (!vf)

			f2g = &gfx_v8_kfd2kgd;

		break;

#endif

#ifdef CONFIG_DRM_AMDGPU_CIK

	case CHIP_HAWAII:

		gfx_target_version = 70001;

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

+1 −7
Original line number Diff line number Diff line
@@ -2558,18 +2558,12 @@ struct device_queue_manager *device_queue_manager_init(struct kfd_node *dev) 
	}



	switch (dev->adev->asic_type) {

	case CHIP_CARRIZO:

		device_queue_manager_init_vi(&dqm->asic_ops);

		break;



	case CHIP_KAVERI:

		device_queue_manager_init_cik(&dqm->asic_ops);

		break;



	case CHIP_HAWAII:

		device_queue_manager_init_cik_hawaii(&dqm->asic_ops);

		break;



	case CHIP_CARRIZO:

	case CHIP_TONGA:

	case CHIP_FIJI:

	case CHIP_POLARIS10: