Merge tag 'dmaengine-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine (99613159) · Commits · EulixOS / Software / Kernel

Documentation/ABI/stable/sysfs-driver-dma-idxd

+41 −11

Original line number	Diff line number	Diff line
		@@ -41,14 +41,14 @@ KernelVersion: 5.6.0
		Contact: dmaengine@vger.kernel.org
		Description: The maximum number of groups can be created under this device.

		What: /sys/bus/dsa/devices/dsa<m>/max_tokens
		Date: Oct 25, 2019
		KernelVersion: 5.6.0
		What: /sys/bus/dsa/devices/dsa<m>/max_read_buffers
		Date: Dec 10, 2021
		KernelVersion: 5.17.0
		Contact: dmaengine@vger.kernel.org
		Description: The total number of bandwidth tokens supported by this device.
		The bandwidth tokens represent resources within the DSA
		Description: The total number of read buffers supported by this device.
		The read buffers represent resources within the DSA
		implementation, and these resources are allocated by engines to
		support operations.
		support operations. See DSA spec v1.2 9.2.4 Total Read Buffers.

		What: /sys/bus/dsa/devices/dsa<m>/max_transfer_size
		Date: Oct 25, 2019
		@@ -115,13 +115,13 @@ KernelVersion: 5.6.0
		Contact: dmaengine@vger.kernel.org
		Description: To indicate if this device is configurable or not.

		What: /sys/bus/dsa/devices/dsa<m>/token_limit
		Date: Oct 25, 2019
		KernelVersion: 5.6.0
		What: /sys/bus/dsa/devices/dsa<m>/read_buffer_limit
		Date: Dec 10, 2021
		KernelVersion: 5.17.0
		Contact: dmaengine@vger.kernel.org
		Description: The maximum number of bandwidth tokens that may be in use at
		Description: The maximum number of read buffers that may be in use at
		one time by operations that access low bandwidth memory in the
		device.
		device. See DSA spec v1.2 9.2.8 GENCFG on Global Read Buffer Limit.

		What: /sys/bus/dsa/devices/dsa<m>/cmd_status
		Date: Aug 28, 2020
		@@ -220,8 +220,38 @@ Contact: dmaengine@vger.kernel.org
		Description: Show the current number of entries in this WQ if WQ Occupancy
		Support bit WQ capabilities is 1.

		What: /sys/bus/dsa/devices/wq<m>.<n>/enqcmds_retries
		Date Oct 29, 2021
		KernelVersion: 5.17.0
		Contact: dmaengine@vger.kernel.org
		Description: Indicate the number of retires for an enqcmds submission on a sharedwq.
		A max value to set attribute is capped at 64.

		What: /sys/bus/dsa/devices/engine<m>.<n>/group_id
		Date: Oct 25, 2019
		KernelVersion: 5.6.0
		Contact: dmaengine@vger.kernel.org
		Description: The group that this engine belongs to.

		What: /sys/bus/dsa/devices/group<m>.<n>/use_read_buffer_limit
		Date: Dec 10, 2021
		KernelVersion: 5.17.0
		Contact: dmaengine@vger.kernel.org
		Description: Enable the use of global read buffer limit for the group. See DSA
		spec v1.2 9.2.18 GRPCFG Use Global Read Buffer Limit.

		What: /sys/bus/dsa/devices/group<m>.<n>/read_buffers_allowed
		Date: Dec 10, 2021
		KernelVersion: 5.17.0
		Contact: dmaengine@vger.kernel.org
		Description: Indicates max number of read buffers that may be in use at one time
		by all engines in the group. See DSA spec v1.2 9.2.18 GRPCFG Read
		Buffers Allowed.

		What: /sys/bus/dsa/devices/group<m>.<n>/read_buffers_reserved
		Date: Dec 10, 2021
		KernelVersion: 5.17.0
		Contact: dmaengine@vger.kernel.org
		Description: Indicates the number of Read Buffers reserved for the use of
		engines in the group. See DSA spec v1.2 9.2.18 GRPCFG Read Buffers
		Reserved.

Documentation/devicetree/bindings/dma/arm,pl330.yaml

0 → 100644

+83 −0

Original line number	Diff line number	Diff line
		# SPDX-License-Identifier: GPL-2.0
		%YAML 1.2
		---
		$id: http://devicetree.org/schemas/dma/arm,pl330.yaml#
		$schema: http://devicetree.org/meta-schemas/core.yaml#

		title: ARM PrimeCell PL330 DMA Controller

		maintainers:
		- Vinod Koul <vkoul@kernel.org>

		description:
		The ARM PrimeCell PL330 DMA controller can move blocks of memory contents
		between memory and peripherals or memory to memory.

		# We need a select here so we don't match all nodes with 'arm,primecell'
		select:
		properties:
		compatible:
		contains:
		const: arm,pl330
		required:
		- compatible

		allOf:
		- $ref: dma-controller.yaml#
		- $ref: /schemas/arm/primecell.yaml#

		properties:
		compatible:
		items:
		- enum:
		- arm,pl330
		- const: arm,primecell

		reg:
		maxItems: 1

		interrupts:
		minItems: 1
		maxItems: 32
		description: A single combined interrupt or an interrupt per event

		'#dma-cells':
		const: 1
		description: Contains the DMA request number for the consumer

		arm,pl330-broken-no-flushp:
		type: boolean
		description: quirk for avoiding to execute DMAFLUSHP

		arm,pl330-periph-burst:
		type: boolean
		description: quirk for performing burst transfer only

		dma-coherent: true

		resets:
		minItems: 1
		maxItems: 2

		reset-names:
		minItems: 1
		items:
		- const: dma
		- const: dma-ocp

		required:
		- compatible
		- reg
		- interrupts

		unevaluatedProperties: false

		examples:
		- \|
		dma-controller@12680000 {
		compatible = "arm,pl330", "arm,primecell";
		reg = <0x12680000 0x1000>;
		interrupts = <99>;
		#dma-cells = <1>;
		};
		...

Documentation/devicetree/bindings/dma/arm-pl08x.yaml

+4 −0

Original line number	Diff line number	Diff line
		@@ -10,6 +10,7 @@ maintainers:
		- Vinod Koul <vkoul@kernel.org>

		allOf:
		- $ref: /schemas/arm/primecell.yaml#
		- $ref: "dma-controller.yaml#"

		# We need a select here so we don't match all nodes with 'arm,primecell'
		@@ -89,6 +90,9 @@ properties:
		- 64
		description: bus width used for memcpy in bits. FTDMAC020 also accept 64 bits

		resets:
		maxItems: 1

		required:
		- reg
		- interrupts

Documentation/devicetree/bindings/dma/arm-pl330.txt

deleted100644 → 0

+0 −49

Original line number	Diff line number	Diff line
		* ARM PrimeCell PL330 DMA Controller

		The ARM PrimeCell PL330 DMA controller can move blocks of memory contents
		between memory and peripherals or memory to memory.

		Required properties:
		- compatible: should include both "arm,pl330" and "arm,primecell".
		- reg: physical base address of the controller and length of memory mapped
		region.
		- interrupts: interrupt number to the cpu.

		Optional properties:
		- dma-coherent : Present if dma operations are coherent
		- #dma-cells: must be <1>. used to represent the number of integer
		cells in the dmas property of client device.
		- dma-channels: contains the total number of DMA channels supported by the DMAC
		- dma-requests: contains the total number of DMA requests supported by the DMAC
		- arm,pl330-broken-no-flushp: quirk for avoiding to execute DMAFLUSHP
		- arm,pl330-periph-burst: quirk for performing burst transfer only
		- resets: contains an entry for each entry in reset-names.
		See ../reset/reset.txt for details.
		- reset-names: must contain at least "dma", and optional is "dma-ocp".

		Example:

		pdma0: pdma@12680000 {
		compatible = "arm,pl330", "arm,primecell";
		reg = <0x12680000 0x1000>;
		interrupts = <99>;
		#dma-cells = <1>;
		#dma-channels = <8>;
		#dma-requests = <32>;
		};

		Client drivers (device nodes requiring dma transfers from dev-to-mem or
		mem-to-dev) should specify the DMA channel numbers and dma channel names
		as shown below.

		[property name] = <[phandle of the dma controller] [dma request id]>;
		[property name] = <[dma channel name]>

		where 'dma request id' is the dma request number which is connected
		to the client controller. The 'property name' 'dmas' and 'dma-names'
		as required by the generic dma device tree binding helpers. The dma
		names correspond 1:1 with the dma request ids in the dmas property.

		Example: dmas = <&pdma0 12
		&pdma1 11>;
		dma-names = "tx", "rx";

Documentation/devicetree/bindings/dma/dma-controller.yaml

+4 −4

Original line number	Diff line number	Diff line
		@@ -24,10 +24,10 @@ examples:
		dma: dma-controller@48000000 {
		compatible = "ti,omap-sdma";
		reg = <0x48000000 0x1000>;
		interrupts = <0 12 0x4
		0 13 0x4
		0 14 0x4
		0 15 0x4>;
		interrupts = <0 12 0x4>,
		<0 13 0x4>,
		<0 14 0x4>,
		<0 15 0x4>;
		#dma-cells = <1>;
		dma-channels = <32>;
		dma-requests = <127>;