Commit 9893f316 authored by Marek Behún's avatar Marek Behún Committed by David S. Miller
Browse files

net: phy: marvell10g: indicate 88X33x0 only port control registers 



Rename port control registers to indicate that they are valid only for
88X33x0, not for 88E21x0.

Signed-off-by: default avatarMarek Behún <kabel@kernel.org>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 0d375542

drivers/net/phy/marvell10g.c

+7 −7
Original line number Diff line number Diff line
@@ -78,10 +78,10 @@ enum { 


	/* Vendor2 MMD registers */

	MV_V2_PORT_CTRL		= 0xf001,

	MV_V2_PORT_CTRL_SWRST	= BIT(15),

	MV_V2_PORT_CTRL_PWRDOWN			= BIT(11),

	MV_V2_PORT_CTRL_MACTYPE_MASK = 0x7,

	MV_V2_PORT_CTRL_MACTYPE_RATE_MATCH = 0x6,

	MV_V2_33X0_PORT_CTRL_SWRST		= BIT(15),

	MV_V2_33X0_PORT_CTRL_MACTYPE_MASK	= 0x7,

	MV_V2_33X0_PORT_CTRL_MACTYPE_RATE_MATCH	= 0x6,

	/* Temperature control/read registers (88X3310 only) */

	MV_V2_TEMP_CTRL		= 0xf08a,

	MV_V2_TEMP_CTRL_MASK	= 0xc000,
@@ -268,7 +268,7 @@ static int mv3310_power_up(struct phy_device *phydev) 
		return ret;



	return phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL,

				MV_V2_PORT_CTRL_SWRST);

				MV_V2_33X0_PORT_CTRL_SWRST);

}



static int mv3310_reset(struct phy_device *phydev, u32 unit)
@@ -479,8 +479,8 @@ static int mv3310_config_init(struct phy_device *phydev) 
	val = phy_read_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL);

	if (val < 0)

		return val;

	priv->rate_match = ((val & MV_V2_PORT_CTRL_MACTYPE_MASK) ==

			MV_V2_PORT_CTRL_MACTYPE_RATE_MATCH);

	priv->rate_match = ((val & MV_V2_33X0_PORT_CTRL_MACTYPE_MASK) ==

			MV_V2_33X0_PORT_CTRL_MACTYPE_RATE_MATCH);



	/* Enable EDPD mode - saving 600mW */

	return mv3310_set_edpd(phydev, ETHTOOL_PHY_EDPD_DFLT_TX_MSECS);