Commit 9885d016 authored by Marek Behún's avatar Marek Behún Committed by David S. Miller
Browse files

net: phy: marvell10g: add separate structure for 88X3340



The 88X3340 contains 4 cores similar to 88X3310, but there is a
difference: it does not support xaui host mode. Instead the
corresponding MACTYPE means
  rxaui / 5gbase-r / 2500base-x / sgmii without AN

Signed-off-by: default avatarMarek Behún <kabel@kernel.org>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent ccbf2891
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+56 −2
Original line number Diff line number Diff line
@@ -557,6 +557,21 @@ static int mv3310_init_interface(struct phy_device *phydev, int mactype)
	return 0;
}

static int mv3340_init_interface(struct phy_device *phydev, int mactype)
{
	struct mv3310_priv *priv = dev_get_drvdata(&phydev->mdio.dev);
	int err = 0;

	priv->rate_match = false;

	if (mactype == MV_V2_3340_PORT_CTRL_MACTYPE_RXAUI_NO_SGMII_AN)
		priv->const_interface = PHY_INTERFACE_MODE_RXAUI;
	else
		err = mv3310_init_interface(phydev, mactype);

	return err;
}

static int mv3310_config_init(struct phy_device *phydev)
{
	struct mv3310_priv *priv = dev_get_drvdata(&phydev->mdio.dev);
@@ -884,6 +899,16 @@ static void mv3310_init_supported_interfaces(unsigned long *mask)
	__set_bit(PHY_INTERFACE_MODE_USXGMII, mask);
}

static void mv3340_init_supported_interfaces(unsigned long *mask)
{
	__set_bit(PHY_INTERFACE_MODE_SGMII, mask);
	__set_bit(PHY_INTERFACE_MODE_2500BASEX, mask);
	__set_bit(PHY_INTERFACE_MODE_5GBASER, mask);
	__set_bit(PHY_INTERFACE_MODE_RXAUI, mask);
	__set_bit(PHY_INTERFACE_MODE_10GBASER, mask);
	__set_bit(PHY_INTERFACE_MODE_USXGMII, mask);
}

static void mv2110_init_supported_interfaces(unsigned long *mask)
{
	__set_bit(PHY_INTERFACE_MODE_SGMII, mask);
@@ -903,6 +928,16 @@ static const struct mv3310_chip mv3310_type = {
#endif
};

static const struct mv3310_chip mv3340_type = {
	.init_supported_interfaces = mv3340_init_supported_interfaces,
	.get_mactype = mv3310_get_mactype,
	.init_interface = mv3340_init_interface,

#ifdef CONFIG_HWMON
	.hwmon_read_temp_reg = mv3310_hwmon_read_temp_reg,
#endif
};

static const struct mv3310_chip mv2110_type = {
	.init_supported_interfaces = mv2110_init_supported_interfaces,
	.get_mactype = mv2110_get_mactype,
@@ -916,7 +951,7 @@ static const struct mv3310_chip mv2110_type = {
static struct phy_driver mv3310_drivers[] = {
	{
		.phy_id		= MARVELL_PHY_ID_88X3310,
		.phy_id_mask	= MARVELL_PHY_ID_MASK,
		.phy_id_mask	= MARVELL_PHY_ID_88X33X0_MASK,
		.name		= "mv88x3310",
		.driver_data	= &mv3310_type,
		.get_features	= mv3310_get_features,
@@ -932,6 +967,24 @@ static struct phy_driver mv3310_drivers[] = {
		.remove		= mv3310_remove,
		.set_loopback	= genphy_c45_loopback,
	},
	{
		.phy_id		= MARVELL_PHY_ID_88X3340,
		.phy_id_mask	= MARVELL_PHY_ID_88X33X0_MASK,
		.name		= "mv88x3340",
		.driver_data	= &mv3340_type,
		.get_features	= mv3310_get_features,
		.config_init	= mv3310_config_init,
		.probe		= mv3310_probe,
		.suspend	= mv3310_suspend,
		.resume		= mv3310_resume,
		.config_aneg	= mv3310_config_aneg,
		.aneg_done	= mv3310_aneg_done,
		.read_status	= mv3310_read_status,
		.get_tunable	= mv3310_get_tunable,
		.set_tunable	= mv3310_set_tunable,
		.remove		= mv3310_remove,
		.set_loopback	= genphy_c45_loopback,
	},
	{
		.phy_id		= MARVELL_PHY_ID_88E2110,
		.phy_id_mask	= MARVELL_PHY_ID_MASK,
@@ -954,7 +1007,8 @@ static struct phy_driver mv3310_drivers[] = {
module_phy_driver(mv3310_drivers);

static struct mdio_device_id __maybe_unused mv3310_tbl[] = {
	{ MARVELL_PHY_ID_88X3310, MARVELL_PHY_ID_MASK },
	{ MARVELL_PHY_ID_88X3310, MARVELL_PHY_ID_88X33X0_MASK },
	{ MARVELL_PHY_ID_88X3340, MARVELL_PHY_ID_88X33X0_MASK },
	{ MARVELL_PHY_ID_88E2110, MARVELL_PHY_ID_MASK },
	{ },
};
+5 −1
Original line number Diff line number Diff line
@@ -22,10 +22,14 @@
#define MARVELL_PHY_ID_88E1545		0x01410ea0
#define MARVELL_PHY_ID_88E1548P		0x01410ec0
#define MARVELL_PHY_ID_88E3016		0x01410e60
#define MARVELL_PHY_ID_88X3310		0x002b09a0
#define MARVELL_PHY_ID_88E2110		0x002b09b0
#define MARVELL_PHY_ID_88X2222		0x01410f10

/* PHY IDs and mask for Alaska 10G PHYs */
#define MARVELL_PHY_ID_88X33X0_MASK	0xfffffff8
#define MARVELL_PHY_ID_88X3310		0x002b09a0
#define MARVELL_PHY_ID_88X3340		0x002b09a8

/* Marvel 88E1111 in Finisar SFP module with modified PHY ID */
#define MARVELL_PHY_ID_88E1111_FINISAR	0x01ff0cc0