Commit 98450637 authored by Leo Yan's avatar Leo Yan Committed by Arnaldo Carvalho de Melo
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perf mem: Add stats for store operation with no available memory level 



Sometimes we don't know memory store operations happen on exactly which
memory (or cache) level, the memory level flag is set to PERF_MEM_LVL_NA
in this case; a practical example is Arm SPE AUX trace sets this flag
for all store operations due to absent info for cache level.

This patch is to add a new item "st_na" in structure c2c_stats to add
statistics for store operations with no available cache level.

Signed-off-by: default avatarLeo Yan <leo.yan@linaro.org>
Acked-by: default avatarJiri Olsa <jolsa@kernel.org>
Cc: Adam Li <adamli@amperemail.onmicrosoft.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ali Saidi <alisaidi@amazon.com>
Cc: Alyssa Ross <hi@alyssa.is>
Cc: German Gomez <german.gomez@arm.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: James Clark <james.clark@arm.com>
Cc: Joe Mario <jmario@redhat.com>
Cc: Kajol Jain <kjain@linux.ibm.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Li Huafei <lihuafei1@huawei.com>
Cc: Like Xu <likexu@tencent.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: https://lore.kernel.org/r/20220518055729.1869566-2-leo.yan@linaro.org


Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
parent 508c9fbc

tools/perf/util/mem-events.c

+3 −0
Original line number Diff line number Diff line
@@ -609,6 +609,8 @@ do { \ 
		}

		if (lvl & P(LVL, MISS))

			if (lvl & P(LVL, L1)) stats->st_l1miss++;

		if (lvl & P(LVL, NA))

			stats->st_na++;

	} else {

		/* unparsable data_src? */

		stats->noparse++;
@@ -635,6 +637,7 @@ void c2c_add_stats(struct c2c_stats *stats, struct c2c_stats *add) 
	stats->st_noadrs	+= add->st_noadrs;

	stats->st_l1hit		+= add->st_l1hit;

	stats->st_l1miss	+= add->st_l1miss;

	stats->st_na		+= add->st_na;

	stats->load		+= add->load;

	stats->ld_excl		+= add->ld_excl;

	stats->ld_shared	+= add->ld_shared;

tools/perf/util/mem-events.h

+1 −0
Original line number Diff line number Diff line
@@ -63,6 +63,7 @@ struct c2c_stats { 
	u32	st_noadrs;           /* cacheable store with no address */

	u32	st_l1hit;            /* count of stores that hit L1D */

	u32	st_l1miss;           /* count of stores that miss L1D */

	u32	st_na;               /* count of stores with memory level is not available */

	u32	load;                /* count of all loads in trace */

	u32	ld_excl;             /* exclusive loads, rmt/lcl DRAM - snp none/miss */

	u32	ld_shared;           /* shared loads, rmt/lcl DRAM - snp hit */