Commit 9840cfcb authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux 

Pull arm64 updates from Will Deacon:
 "There's a reasonable amount here and the juicy details are all below.

  It's worth noting that the MTE/KASAN changes strayed outside of our
  usual directories due to core mm changes and some associated changes
  to some other architectures; Andrew asked for us to carry these [1]
  rather that take them via the -mm tree.

  Summary:

   - Optimise SVE switching for CPUs with 128-bit implementations.

   - Fix output format from SVE selftest.

   - Add support for versions v1.2 and 1.3 of the SMC calling
     convention.

   - Allow Pointer Authentication to be configured independently for
     kernel and userspace.

   - PMU driver cleanups for managing IRQ affinity and exposing event
     attributes via sysfs.

   - KASAN optimisations for both hardware tagging (MTE) and out-of-line
     software tagging implementations.

   - Relax frame record alignment requirements to facilitate 8-byte
     alignment with KASAN and Clang.

   - Cleanup of page-table definitions and removal of unused memory
     types.

   - Reduction of ARCH_DMA_MINALIGN back to 64 bytes.

   - Refactoring of our instruction decoding routines and addition of
     some missing encodings.

   - Move entry code moved into C and hardened against harmful compiler
     instrumentation.

   - Update booting requirements for the FEAT_HCX feature, added to v8.7
     of the architecture.

   - Fix resume from idle when pNMI is being used.

   - Additional CPU sanity checks for MTE and preparatory changes for
     systems where not all of the CPUs support 32-bit EL0.

   - Update our kernel string routines to the latest Cortex Strings
     implementation.

   - Big cleanup of our cache maintenance routines, which were
     confusingly named and inconsistent in their implementations.

   - Tweak linker flags so that GDB can understand vmlinux when using
     RELR relocations.

   - Boot path cleanups to enable early initialisation of per-cpu
     operations needed by KCSAN.

   - Non-critical fixes and miscellaneous cleanup"

* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (150 commits)
  arm64: tlb: fix the TTL value of tlb_get_level
  arm64: Restrict undef hook for cpufeature registers
  arm64/mm: Rename ARM64_SWAPPER_USES_SECTION_MAPS
  arm64: insn: avoid circular include dependency
  arm64: smp: Bump debugging information print down to KERN_DEBUG
  drivers/perf: fix the missed ida_simple_remove() in ddr_perf_probe()
  perf/arm-cmn: Fix invalid pointer when access dtc object sharing the same IRQ number
  arm64: suspend: Use cpuidle context helpers in cpu_suspend()
  PSCI: Use cpuidle context helpers in psci_cpu_suspend_enter()
  arm64: Convert cpu_do_idle() to using cpuidle context helpers
  arm64: Add cpuidle context save/restore helpers
  arm64: head: fix code comments in set_cpu_boot_mode_flag
  arm64: mm: drop unused __pa(__idmap_text_start)
  arm64: mm: fix the count comments in compute_indices
  arm64/mm: Fix ttbr0 values stored in struct thread_info for software-pan
  arm64: mm: Pass original fault address to handle_mm_fault()
  arm64/mm: Drop SECTION_[SHIFT|SIZE|MASK]
  arm64/mm: Use CONT_PMD_SHIFT for ARM64_MEMSTART_SHIFT
  arm64/mm: Drop SWAPPER_INIT_MAP_SIZE
  arm64: Conditionally configure PTR_AUTH key of the kernel.
  ...
parents 17cfb9d3 3d1bf78c

Documentation/arm64/booting.rst

+6 −0
Original line number Diff line number Diff line
@@ -277,6 +277,12 @@ Before jumping into the kernel, the following conditions must be met: 


    - SCR_EL3.FGTEn (bit 27) must be initialised to 0b1.



  For CPUs with support for HCRX_EL2 (FEAT_HCX) present:



  - If EL3 is present and the kernel is entered at EL2:



    - SCR_EL3.HXEn (bit 38) must be initialised to 0b1.



  For CPUs with Advanced SIMD and floating point support:



  - If EL3 is present:

Makefile

+1 −1
Original line number Diff line number Diff line
@@ -1039,7 +1039,7 @@ LDFLAGS_vmlinux += $(call ld-option, -X,) 
endif



ifeq ($(CONFIG_RELR),y)

LDFLAGS_vmlinux	+= --pack-dyn-relocs=relr

LDFLAGS_vmlinux	+= --pack-dyn-relocs=relr --use-android-relr-tags

endif



# We never want expected sections to be placed heuristically by the

arch/alpha/include/asm/page.h

+3 −3
Original line number Diff line number Diff line
@@ -17,9 +17,9 @@ 
extern void clear_page(void *page);

#define clear_user_page(page, vaddr, pg)	clear_page(page)



#define __alloc_zeroed_user_highpage(movableflags, vma, vaddr) \

	alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vmaddr)

#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE

#define alloc_zeroed_user_highpage_movable(vma, vaddr) \

	alloc_page_vma(GFP_HIGHUSER_MOVABLE | __GFP_ZERO, vma, vmaddr)

#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE_MOVABLE



extern void copy_page(void * _to, void * _from);

#define copy_user_page(to, from, vaddr, pg)	copy_page(to, from)

arch/arm/include/asm/cpuidle.h

+5 −0
Original line number Diff line number Diff line
@@ -50,4 +50,9 @@ extern int arm_cpuidle_suspend(int index); 


extern int arm_cpuidle_init(int cpu);



struct arm_cpuidle_irq_context { };



#define arm_cpuidle_save_irq_context(c)		(void)c

#define arm_cpuidle_restore_irq_context(c)	(void)c



#endif

arch/arm/kernel/perf_event_v7.c

+2 −2
Original line number Diff line number Diff line
@@ -773,10 +773,10 @@ static inline void armv7pmu_write_counter(struct perf_event *event, u64 value) 
		pr_err("CPU%u writing wrong counter %d\n",

			smp_processor_id(), idx);

	} else if (idx == ARMV7_IDX_CYCLE_COUNTER) {

		asm volatile("mcr p15, 0, %0, c9, c13, 0" : : "r" (value));

		asm volatile("mcr p15, 0, %0, c9, c13, 0" : : "r" ((u32)value));

	} else {

		armv7_pmnc_select_counter(idx);

		asm volatile("mcr p15, 0, %0, c9, c13, 2" : : "r" (value));

		asm volatile("mcr p15, 0, %0, c9, c13, 2" : : "r" ((u32)value));

	}

}