Commit 982365a8 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'riscv-for-linus-6.4-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux 

Pull more RISC-V updates from Palmer Dabbelt:

 - Support for hibernation

 - The .rela.dyn section has been moved to the init area

 - A fix for the SBI probing to allow for implementation-defined
   behavior

 - Various other fixes and cleanups throughout the tree

* tag 'riscv-for-linus-6.4-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  RISC-V: include cpufeature.h in cpufeature.c
  riscv: Move .rela.dyn to the init sections
  dt-bindings: riscv: explicitly mention assumption of Zicsr & Zifencei support
  riscv: compat_syscall_table: Fixup compile warning
  RISC-V: fixup in-flight collision with ARCH_WANT_OPTIMIZE_VMEMMAP rename
  RISC-V: fix sifive and thead section mismatches in errata
  RISC-V: Align SBI probe implementation with spec
  riscv: mm: remove redundant parameter of create_fdt_early_page_table
  riscv: Adjust dependencies of HAVE_DYNAMIC_FTRACE selection
  RISC-V: Add arch functions to support hibernation/suspend-to-disk
  RISC-V: mm: Enable huge page support to kernel_page_present() function
  RISC-V: Factor out common code of __cpu_resume_enter()
  RISC-V: Change suspend_save_csrs and suspend_restore_csrs to public function
parents 493804a6 c2d3c844

Documentation/devicetree/bindings/riscv/cpus.yaml

+6 −0
Original line number Diff line number Diff line
@@ -86,6 +86,12 @@ properties: 
      User-Level ISA document, available from

      https://riscv.org/specifications/



      Due to revisions of the ISA specification, some deviations

      have arisen over time.

      Notably, riscv,isa was defined prior to the creation of the

      Zicsr and Zifencei extensions and thus "i" implies

      "zicsr_zifencei".



      While the isa strings in ISA specification are case

      insensitive, letters in the riscv,isa string must be all

      lowercase to simplify parsing.

arch/riscv/Kconfig

+20 −3
Original line number Diff line number Diff line
@@ -47,16 +47,16 @@ config RISCV 
	select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU

	select ARCH_WANT_FRAME_POINTERS

	select ARCH_WANT_GENERAL_HUGETLB if !RISCV_ISA_SVNAPOT

	select ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP

	select ARCH_WANT_HUGE_PMD_SHARE if 64BIT

	select ARCH_WANT_LD_ORPHAN_WARN if !XIP_KERNEL

	select ARCH_WANT_OPTIMIZE_VMEMMAP

	select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE

	select BINFMT_FLAT_NO_DATA_START_OFFSET if !MMU

	select BUILDTIME_TABLE_SORT if MMU

	select CLINT_TIMER if !MMU

	select CLONE_BACKWARDS

	select COMMON_CLK

	select CPU_PM if CPU_IDLE

	select CPU_PM if CPU_IDLE || HIBERNATION

	select EDAC_SUPPORT

	select GENERIC_ARCH_TOPOLOGY

	select GENERIC_ATOMIC64 if !64BIT
@@ -142,12 +142,23 @@ config RISCV 
	select TRACE_IRQFLAGS_SUPPORT

	select UACCESS_MEMCPY if !MMU

	select ZONE_DMA32 if 64BIT

	select HAVE_DYNAMIC_FTRACE if !XIP_KERNEL && MMU && $(cc-option,-fpatchable-function-entry=8)

	select HAVE_DYNAMIC_FTRACE if !XIP_KERNEL && MMU && (CLANG_SUPPORTS_DYNAMIC_FTRACE || GCC_SUPPORTS_DYNAMIC_FTRACE)

	select HAVE_DYNAMIC_FTRACE_WITH_REGS if HAVE_DYNAMIC_FTRACE

	select HAVE_FTRACE_MCOUNT_RECORD if !XIP_KERNEL

	select HAVE_FUNCTION_GRAPH_TRACER

	select HAVE_FUNCTION_TRACER if !XIP_KERNEL && !PREEMPTION



config CLANG_SUPPORTS_DYNAMIC_FTRACE

	def_bool CC_IS_CLANG

	# https://github.com/llvm/llvm-project/commit/6ab8927931851bb42b2c93a00801dc499d7d9b1e

	depends on CLANG_VERSION >= 130000

	# https://github.com/ClangBuiltLinux/linux/issues/1817

	depends on AS_IS_GNU || (AS_IS_LLVM && (LD_IS_LLD || LD_VERSION >= 23600))



config GCC_SUPPORTS_DYNAMIC_FTRACE

	def_bool CC_IS_GCC

	depends on $(cc-option,-fpatchable-function-entry=8)



config ARCH_MMAP_RND_BITS_MIN

	default 18 if 64BIT

	default 8
@@ -788,6 +799,12 @@ menu "Power management options" 


source "kernel/power/Kconfig"



config ARCH_HIBERNATION_POSSIBLE

	def_bool y



config ARCH_HIBERNATION_HEADER

	def_bool HIBERNATION



endmenu # "Power management options"



menu "CPU Power Management"

arch/riscv/errata/sifive/errata.c

+3 −5
Original line number Diff line number Diff line
@@ -82,10 +82,8 @@ static void __init_or_module warn_miss_errata(u32 miss_errata) 
	pr_warn("----------------------------------------------------------------\n");

}



void __init_or_module sifive_errata_patch_func(struct alt_entry *begin,

					       struct alt_entry *end,

					       unsigned long archid,

					       unsigned long impid,

void sifive_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,

			      unsigned long archid, unsigned long impid,

			      unsigned int stage)

{

	struct alt_entry *alt;

arch/riscv/errata/thead/errata.c

+3 −3
Original line number Diff line number Diff line
@@ -83,7 +83,7 @@ static u32 thead_errata_probe(unsigned int stage, 
	return cpu_req_errata;

}



void __init_or_module thead_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,

void thead_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,

			     unsigned long archid, unsigned long impid,

			     unsigned int stage)

{

arch/riscv/include/asm/assembler.h

0 → 100644
+82 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * Copyright (C) 2023 StarFive Technology Co., Ltd.

 *

 * Author: Jee Heng Sia <jeeheng.sia@starfivetech.com>

 */



#ifndef __ASSEMBLY__

#error "Only include this from assembly code"

#endif



#ifndef __ASM_ASSEMBLER_H

#define __ASM_ASSEMBLER_H



#include <asm/asm.h>

#include <asm/asm-offsets.h>

#include <asm/csr.h>



/*

 * suspend_restore_csrs - restore CSRs

 */

	.macro suspend_restore_csrs

		REG_L	t0, (SUSPEND_CONTEXT_REGS + PT_EPC)(a0)

		csrw	CSR_EPC, t0

		REG_L	t0, (SUSPEND_CONTEXT_REGS + PT_STATUS)(a0)

		csrw	CSR_STATUS, t0

		REG_L	t0, (SUSPEND_CONTEXT_REGS + PT_BADADDR)(a0)

		csrw	CSR_TVAL, t0

		REG_L	t0, (SUSPEND_CONTEXT_REGS + PT_CAUSE)(a0)

		csrw	CSR_CAUSE, t0

	.endm



/*

 * suspend_restore_regs - Restore registers (except A0 and T0-T6)

 */

	.macro suspend_restore_regs

		REG_L	ra, (SUSPEND_CONTEXT_REGS + PT_RA)(a0)

		REG_L	sp, (SUSPEND_CONTEXT_REGS + PT_SP)(a0)

		REG_L	gp, (SUSPEND_CONTEXT_REGS + PT_GP)(a0)

		REG_L	tp, (SUSPEND_CONTEXT_REGS + PT_TP)(a0)

		REG_L	s0, (SUSPEND_CONTEXT_REGS + PT_S0)(a0)

		REG_L	s1, (SUSPEND_CONTEXT_REGS + PT_S1)(a0)

		REG_L	a1, (SUSPEND_CONTEXT_REGS + PT_A1)(a0)

		REG_L	a2, (SUSPEND_CONTEXT_REGS + PT_A2)(a0)

		REG_L	a3, (SUSPEND_CONTEXT_REGS + PT_A3)(a0)

		REG_L	a4, (SUSPEND_CONTEXT_REGS + PT_A4)(a0)

		REG_L	a5, (SUSPEND_CONTEXT_REGS + PT_A5)(a0)

		REG_L	a6, (SUSPEND_CONTEXT_REGS + PT_A6)(a0)

		REG_L	a7, (SUSPEND_CONTEXT_REGS + PT_A7)(a0)

		REG_L	s2, (SUSPEND_CONTEXT_REGS + PT_S2)(a0)

		REG_L	s3, (SUSPEND_CONTEXT_REGS + PT_S3)(a0)

		REG_L	s4, (SUSPEND_CONTEXT_REGS + PT_S4)(a0)

		REG_L	s5, (SUSPEND_CONTEXT_REGS + PT_S5)(a0)

		REG_L	s6, (SUSPEND_CONTEXT_REGS + PT_S6)(a0)

		REG_L	s7, (SUSPEND_CONTEXT_REGS + PT_S7)(a0)

		REG_L	s8, (SUSPEND_CONTEXT_REGS + PT_S8)(a0)

		REG_L	s9, (SUSPEND_CONTEXT_REGS + PT_S9)(a0)

		REG_L	s10, (SUSPEND_CONTEXT_REGS + PT_S10)(a0)

		REG_L	s11, (SUSPEND_CONTEXT_REGS + PT_S11)(a0)

	.endm



/*

 * copy_page - copy 1 page (4KB) of data from source to destination

 * @a0 - destination

 * @a1 - source

 */

	.macro	copy_page a0, a1

		lui	a2, 0x1

		add	a2, a2, a0

1 :

		REG_L	t0, 0(a1)

		REG_L	t1, SZREG(a1)



		REG_S	t0, 0(a0)

		REG_S	t1, SZREG(a0)



		addi	a0, a0, 2 * SZREG

		addi	a1, a1, 2 * SZREG

		bne	a2, a0, 1b

	.endm



#endif	/* __ASM_ASSEMBLER_H */