Commit 97f7d41f authored by Linus Walleij's avatar Linus Walleij
Browse files

Merge tag 'sh-pfc-for-v5.6-tag1' of...

Merge tag 'sh-pfc-for-v5.6-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: sh-pfc: Updates for v5.5

  - Split R-Car H3 support in two independent drivers,
  - Miscellaneous fixes and cleanups.
parents 9a4c2274 f2bc0756
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+0 −6
Original line number Diff line number Diff line
@@ -112,12 +112,6 @@ enum {
	GPIO_FN_TIOC0D, GPIO_FN_TIOC0C, GPIO_FN_TIOC0B, GPIO_FN_TIOC0A,
	GPIO_FN_TCLKD, GPIO_FN_TCLKC, GPIO_FN_TCLKB, GPIO_FN_TCLKA,

	/* SSU */
	GPIO_FN_SCS0_PD, GPIO_FN_SSO0_PD, GPIO_FN_SSI0_PD, GPIO_FN_SSCK0_PD,
	GPIO_FN_SCS0_PF, GPIO_FN_SSO0_PF, GPIO_FN_SSI0_PF, GPIO_FN_SSCK0_PF,
	GPIO_FN_SCS1_PD, GPIO_FN_SSO1_PD, GPIO_FN_SSI1_PD, GPIO_FN_SSCK1_PD,
	GPIO_FN_SCS1_PF, GPIO_FN_SSO1_PF, GPIO_FN_SSI1_PF, GPIO_FN_SSCK1_PF,

	/* SCIF */
	GPIO_FN_SCK0, GPIO_FN_SCK1, GPIO_FN_SCK2, GPIO_FN_SCK3,
	GPIO_FN_RXD0, GPIO_FN_RXD1, GPIO_FN_RXD2, GPIO_FN_RXD3,
+9 −8
Original line number Diff line number Diff line
@@ -78,8 +78,15 @@ enum {
	GPIO_FN_WDTOVF,

	/* CAN */
	GPIO_FN_CTX1, GPIO_FN_CRX1, GPIO_FN_CTX0, GPIO_FN_CTX0_CTX1,
	GPIO_FN_CRX0, GPIO_FN_CRX0_CRX1, GPIO_FN_CRX0_CRX1_CRX2,
	GPIO_FN_CTX2, GPIO_FN_CRX2,
	GPIO_FN_CTX1, GPIO_FN_CRX1,
	GPIO_FN_CTX0, GPIO_FN_CRX0,
	GPIO_FN_CTX0_CTX1, GPIO_FN_CRX0_CRX1,
	GPIO_FN_CTX0_CTX1_CTX2, GPIO_FN_CRX0_CRX1_CRX2,
	GPIO_FN_CTX2_PJ21, GPIO_FN_CRX2_PJ20,
	GPIO_FN_CTX1_PJ23, GPIO_FN_CRX1_PJ22,
	GPIO_FN_CTX0_CTX1_PJ23, GPIO_FN_CRX0_CRX1_PJ22,
	GPIO_FN_CTX0_CTX1_CTX2_PJ21, GPIO_FN_CRX0_CRX1_CRX2_PJ20,

	/* DMAC */
	GPIO_FN_TEND0, GPIO_FN_DACK0, GPIO_FN_DREQ0,
@@ -119,12 +126,6 @@ enum {
	GPIO_FN_TIOC0D, GPIO_FN_TIOC0C, GPIO_FN_TIOC0B, GPIO_FN_TIOC0A,
	GPIO_FN_TCLKD, GPIO_FN_TCLKC, GPIO_FN_TCLKB, GPIO_FN_TCLKA,

	/* SSU */
	GPIO_FN_SCS0_PD, GPIO_FN_SSO0_PD, GPIO_FN_SSI0_PD, GPIO_FN_SSCK0_PD,
	GPIO_FN_SCS0_PF, GPIO_FN_SSO0_PF, GPIO_FN_SSI0_PF, GPIO_FN_SSCK0_PF,
	GPIO_FN_SCS1_PD, GPIO_FN_SSO1_PD, GPIO_FN_SSI1_PD, GPIO_FN_SSCK1_PD,
	GPIO_FN_SCS1_PF, GPIO_FN_SSO1_PF, GPIO_FN_SSI1_PF, GPIO_FN_SSCK1_PF,

	/* SCIF */
	GPIO_FN_SCK0, GPIO_FN_RXD0, GPIO_FN_TXD0,
	GPIO_FN_SCK1, GPIO_FN_RXD1, GPIO_FN_TXD1, GPIO_FN_RTS1, GPIO_FN_CTS1,
+2 −2
Original line number Diff line number Diff line
@@ -1229,7 +1229,7 @@ static int rza1_parse_gpiochip(struct rza1_pinctrl *rza1_pctl,

	pinctrl_add_gpio_range(rza1_pctl->pctl, range);

	dev_info(rza1_pctl->dev, "Parsed gpiochip %s with %d pins\n",
	dev_dbg(rza1_pctl->dev, "Parsed gpiochip %s with %d pins\n",
		chip->label, chip->ngpio);

	return 0;
+8 −4
Original line number Diff line number Diff line
@@ -26,8 +26,9 @@ config PINCTRL_SH_PFC
	select PINCTRL_PFC_R8A7792 if ARCH_R8A7792
	select PINCTRL_PFC_R8A7793 if ARCH_R8A7793
	select PINCTRL_PFC_R8A7794 if ARCH_R8A7794
	select PINCTRL_PFC_R8A7795 if ARCH_R8A7795
	select PINCTRL_PFC_R8A77960 if ARCH_R8A77960 || ARCH_R8A7796
	select PINCTRL_PFC_R8A77950 if ARCH_R8A77950 || ARCH_R8A7795
	select PINCTRL_PFC_R8A77951 if ARCH_R8A77951 || ARCH_R8A7795
	select PINCTRL_PFC_R8A77960 if ARCH_R8A77960
	select PINCTRL_PFC_R8A77961 if ARCH_R8A77961
	select PINCTRL_PFC_R8A77965 if ARCH_R8A77965
	select PINCTRL_PFC_R8A77970 if ARCH_R8A77970
@@ -115,8 +116,11 @@ config PINCTRL_PFC_R8A7793
config PINCTRL_PFC_R8A7794
	bool "R-Car E2 pin control support" if COMPILE_TEST

config PINCTRL_PFC_R8A7795
	bool "R-Car H3 pin control support" if COMPILE_TEST
config PINCTRL_PFC_R8A77950
	bool "R-Car H3 ES1.x pin control support" if COMPILE_TEST

config PINCTRL_PFC_R8A77951
	bool "R-Car H3 ES2.0+ pin control support" if COMPILE_TEST

config PINCTRL_PFC_R8A77960
	bool "R-Car M3-W pin control support" if COMPILE_TEST
+2 −2
Original line number Diff line number Diff line
@@ -18,8 +18,8 @@ obj-$(CONFIG_PINCTRL_PFC_R8A7791) += pfc-r8a7791.o
obj-$(CONFIG_PINCTRL_PFC_R8A7792)	+= pfc-r8a7792.o
obj-$(CONFIG_PINCTRL_PFC_R8A7793)	+= pfc-r8a7791.o
obj-$(CONFIG_PINCTRL_PFC_R8A7794)	+= pfc-r8a7794.o
obj-$(CONFIG_PINCTRL_PFC_R8A7795)	+= pfc-r8a7795.o
obj-$(CONFIG_PINCTRL_PFC_R8A7795)	+= pfc-r8a7795-es1.o
obj-$(CONFIG_PINCTRL_PFC_R8A77950)	+= pfc-r8a77950.o
obj-$(CONFIG_PINCTRL_PFC_R8A77951)	+= pfc-r8a77951.o
obj-$(CONFIG_PINCTRL_PFC_R8A77960)	+= pfc-r8a7796.o
obj-$(CONFIG_PINCTRL_PFC_R8A77961)	+= pfc-r8a7796.o
obj-$(CONFIG_PINCTRL_PFC_R8A77965)	+= pfc-r8a77965.o
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