Unverified Commit 97e2b5e5 authored by Lucas Tanure's avatar Lucas Tanure Committed by Mark Brown
Browse files

ASoC: cs42l42: Fix Bitclock polarity inversion 



The driver was setting bit clock polarity opposite to intended polarity.
Also simplify the code by grouping ADC and DAC clock configurations into
a single field.

Signed-off-by: default avatarLucas Tanure <tanureal@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20210305173442.195740-2-tanureal@opensource.cirrus.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent c0141704

sound/soc/codecs/cs42l42.c

+8 −12
Original line number Diff line number Diff line
@@ -797,27 +797,23 @@ static int cs42l42_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) 
	/* Bitclock/frame inversion */

	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {

	case SND_SOC_DAIFMT_NB_NF:

		asp_cfg_val |= CS42L42_ASP_SCPOL_NOR << CS42L42_ASP_SCPOL_SHIFT;

		break;

	case SND_SOC_DAIFMT_NB_IF:

		asp_cfg_val |= CS42L42_ASP_POL_INV <<

				CS42L42_ASP_LCPOL_IN_SHIFT;

		asp_cfg_val |= CS42L42_ASP_SCPOL_NOR << CS42L42_ASP_SCPOL_SHIFT;

		asp_cfg_val |= CS42L42_ASP_LCPOL_INV << CS42L42_ASP_LCPOL_SHIFT;

		break;

	case SND_SOC_DAIFMT_IB_NF:

		asp_cfg_val |= CS42L42_ASP_POL_INV <<

				CS42L42_ASP_SCPOL_IN_DAC_SHIFT;

		break;

	case SND_SOC_DAIFMT_IB_IF:

		asp_cfg_val |= CS42L42_ASP_POL_INV <<

				CS42L42_ASP_LCPOL_IN_SHIFT;

		asp_cfg_val |= CS42L42_ASP_POL_INV <<

				CS42L42_ASP_SCPOL_IN_DAC_SHIFT;

		asp_cfg_val |= CS42L42_ASP_LCPOL_INV << CS42L42_ASP_LCPOL_SHIFT;

		break;

	}



	snd_soc_component_update_bits(component, CS42L42_ASP_CLK_CFG,

				CS42L42_ASP_MODE_MASK |

				CS42L42_ASP_SCPOL_IN_DAC_MASK |

				CS42L42_ASP_LCPOL_IN_MASK, asp_cfg_val);

	snd_soc_component_update_bits(component, CS42L42_ASP_CLK_CFG, CS42L42_ASP_MODE_MASK |

								      CS42L42_ASP_SCPOL_MASK |

								      CS42L42_ASP_LCPOL_MASK,

								      asp_cfg_val);



	return 0;

}

sound/soc/codecs/cs42l42.h

+6 −5
Original line number Diff line number Diff line
@@ -258,11 +258,12 @@ 
#define CS42L42_ASP_SLAVE_MODE		0x00

#define CS42L42_ASP_MODE_SHIFT		4

#define CS42L42_ASP_MODE_MASK		(1 << CS42L42_ASP_MODE_SHIFT)

#define CS42L42_ASP_SCPOL_IN_DAC_SHIFT	2

#define CS42L42_ASP_SCPOL_IN_DAC_MASK	(1 << CS42L42_ASP_SCPOL_IN_DAC_SHIFT)

#define CS42L42_ASP_LCPOL_IN_SHIFT	0

#define CS42L42_ASP_LCPOL_IN_MASK	(1 << CS42L42_ASP_LCPOL_IN_SHIFT)

#define CS42L42_ASP_POL_INV		1

#define CS42L42_ASP_SCPOL_SHIFT		2

#define CS42L42_ASP_SCPOL_MASK		(3 << CS42L42_ASP_SCPOL_SHIFT)

#define CS42L42_ASP_SCPOL_NOR		3

#define CS42L42_ASP_LCPOL_SHIFT		0

#define CS42L42_ASP_LCPOL_MASK		(3 << CS42L42_ASP_LCPOL_SHIFT)

#define CS42L42_ASP_LCPOL_INV		3



#define CS42L42_ASP_FRM_CFG		(CS42L42_PAGE_12 + 0x08)

#define CS42L42_ASP_STP_SHIFT		4