Commit 979e1b32 authored by Imre Deak's avatar Imre Deak
Browse files

drm/i915: Sanitize the port -> DDI/AUX power domain mapping for each platform 



Atm the port -> DDI and AUX power domain mapping is specified by relying
on the aliasing of the platform specific intel_display_power_domain enum
values. For instance D12+ platforms refer to the 'D' port and power
domain instances, which doesn't match the bspec terminology, on these
platforms the corresponding port is TC1. To make it clear what
port/domain the code refers to add a mapping between them which matches
the bspec terms on different display versions.

This also allows for removing the aliasing in enum values in a follow-up
patch.

v2: Add the functions to intel_display_power.c, use
    intel_display_power_ prefix.

Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Reviewed-by: default avatarJouni Högander <jouni.hogander@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220414210657.1785773-14-imre.deak@intel.com
parent eb6dedcc

drivers/gpu/drm/i915/display/g4x_dp.c

+2 −1
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ 
#include "intel_connector.h"

#include "intel_crtc.h"

#include "intel_de.h"

#include "intel_display_power.h"

#include "intel_display_types.h"

#include "intel_dp.h"

#include "intel_dp_link_training.h"
@@ -1375,7 +1376,7 @@ bool g4x_dp_init(struct drm_i915_private *dev_priv, 
	dig_port->max_lanes = 4;



	intel_encoder->type = INTEL_OUTPUT_DP;

	intel_encoder->power_domain = intel_port_to_power_domain(port);

	intel_encoder->power_domain = intel_display_power_ddi_lanes_domain(dev_priv, port);

	if (IS_CHERRYVIEW(dev_priv)) {

		if (port == PORT_D)

			intel_encoder->pipe_mask = BIT(PIPE_C);

drivers/gpu/drm/i915/display/g4x_hdmi.c

+2 −1
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ 
#include "intel_connector.h"

#include "intel_crtc.h"

#include "intel_de.h"

#include "intel_display_power.h"

#include "intel_display_types.h"

#include "intel_dpio_phy.h"

#include "intel_fifo_underrun.h"
@@ -574,7 +575,7 @@ void g4x_hdmi_init(struct drm_i915_private *dev_priv, 
	intel_encoder->shutdown = intel_hdmi_encoder_shutdown;



	intel_encoder->type = INTEL_OUTPUT_HDMI;

	intel_encoder->power_domain = intel_port_to_power_domain(port);

	intel_encoder->power_domain = intel_display_power_ddi_lanes_domain(dev_priv, port);

	intel_encoder->port = port;

	if (IS_CHERRYVIEW(dev_priv)) {

		if (port == PORT_D)

drivers/gpu/drm/i915/display/intel_ddi.c

+3 −3
Original line number Diff line number Diff line
@@ -40,6 +40,7 @@ 
#include "intel_ddi.h"

#include "intel_ddi_buf_trans.h"

#include "intel_de.h"

#include "intel_display_power.h"

#include "intel_display_types.h"

#include "intel_dp.h"

#include "intel_dp_link_training.h"
@@ -4364,7 +4365,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port) 
	encoder->get_power_domains = intel_ddi_get_power_domains;



	encoder->type = INTEL_OUTPUT_DDI;

	encoder->power_domain = intel_port_to_power_domain(port);

	encoder->power_domain = intel_display_power_ddi_lanes_domain(dev_priv, port);

	encoder->port = port;

	encoder->cloneable = 0;

	encoder->pipe_mask = ~0;
@@ -4492,8 +4493,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port) 
	}



	drm_WARN_ON(&dev_priv->drm, port > PORT_I);

	dig_port->ddi_io_power_domain = POWER_DOMAIN_PORT_DDI_IO_A +

					      port - PORT_A;

	dig_port->ddi_io_power_domain = intel_display_power_ddi_io_domain(dev_priv, port);



	if (init_dp) {

		if (!intel_ddi_init_dp_connector(dig_port))

drivers/gpu/drm/i915/display/intel_display.c

+5 −80
Original line number Diff line number Diff line
@@ -51,6 +51,7 @@ 
#include "display/intel_crt.h"

#include "display/intel_ddi.h"

#include "display/intel_display_debugfs.h"

#include "display/intel_display_power.h"

#include "display/intel_dp.h"

#include "display/intel_dp_mst.h"

#include "display/intel_dpll.h"
@@ -2157,91 +2158,15 @@ enum tc_port intel_port_to_tc(struct drm_i915_private *dev_priv, enum port port) 
		return TC_PORT_1 + port - PORT_C;

}



enum intel_display_power_domain intel_port_to_power_domain(enum port port)

{

	switch (port) {

	case PORT_A:

		return POWER_DOMAIN_PORT_DDI_LANES_A;

	case PORT_B:

		return POWER_DOMAIN_PORT_DDI_LANES_B;

	case PORT_C:

		return POWER_DOMAIN_PORT_DDI_LANES_C;

	case PORT_D:

		return POWER_DOMAIN_PORT_DDI_LANES_D;

	case PORT_E:

		return POWER_DOMAIN_PORT_DDI_LANES_E;

	case PORT_F:

		return POWER_DOMAIN_PORT_DDI_LANES_F;

	case PORT_G:

		return POWER_DOMAIN_PORT_DDI_LANES_G;

	case PORT_H:

		return POWER_DOMAIN_PORT_DDI_LANES_H;

	case PORT_I:

		return POWER_DOMAIN_PORT_DDI_LANES_I;

	default:

		MISSING_CASE(port);

		return POWER_DOMAIN_PORT_OTHER;

	}

}



enum intel_display_power_domain

intel_aux_power_domain(struct intel_digital_port *dig_port)

{

	if (intel_tc_port_in_tbt_alt_mode(dig_port)) {

		switch (dig_port->aux_ch) {

		case AUX_CH_C:

			return POWER_DOMAIN_AUX_TBT_C;

		case AUX_CH_D:

			return POWER_DOMAIN_AUX_TBT_D;

		case AUX_CH_E:

			return POWER_DOMAIN_AUX_TBT_E;

		case AUX_CH_F:

			return POWER_DOMAIN_AUX_TBT_F;

		case AUX_CH_G:

			return POWER_DOMAIN_AUX_TBT_G;

		case AUX_CH_H:

			return POWER_DOMAIN_AUX_TBT_H;

		case AUX_CH_I:

			return POWER_DOMAIN_AUX_TBT_I;

		default:

			MISSING_CASE(dig_port->aux_ch);

			return POWER_DOMAIN_AUX_TBT_C;

		}

	}

	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);



	return intel_legacy_aux_to_power_domain(dig_port->aux_ch);

}

	if (intel_tc_port_in_tbt_alt_mode(dig_port))

		return intel_display_power_tbt_aux_domain(i915, dig_port->aux_ch);



/*

 * Converts aux_ch to power_domain without caring about TBT ports for that use

 * intel_aux_power_domain()

 */

enum intel_display_power_domain

intel_legacy_aux_to_power_domain(enum aux_ch aux_ch)

{

	switch (aux_ch) {

	case AUX_CH_A:

		return POWER_DOMAIN_AUX_A;

	case AUX_CH_B:

		return POWER_DOMAIN_AUX_B;

	case AUX_CH_C:

		return POWER_DOMAIN_AUX_C;

	case AUX_CH_D:

		return POWER_DOMAIN_AUX_D;

	case AUX_CH_E:

		return POWER_DOMAIN_AUX_E;

	case AUX_CH_F:

		return POWER_DOMAIN_AUX_F;

	case AUX_CH_G:

		return POWER_DOMAIN_AUX_G;

	case AUX_CH_H:

		return POWER_DOMAIN_AUX_H;

	case AUX_CH_I:

		return POWER_DOMAIN_AUX_I;

	default:

		MISSING_CASE(aux_ch);

		return POWER_DOMAIN_AUX_A;

	}

	return intel_display_power_legacy_aux_domain(i915, dig_port->aux_ch);

}



static void get_crtc_power_domains(struct intel_crtc_state *crtc_state,

drivers/gpu/drm/i915/display/intel_display.h

+1 −3
Original line number Diff line number Diff line
@@ -635,11 +635,9 @@ void intel_cpu_transcoder_get_m2_n2(struct intel_crtc *crtc, 
void i9xx_crtc_clock_get(struct intel_crtc *crtc,

			 struct intel_crtc_state *pipe_config);

int intel_dotclock_calculate(int link_freq, const struct intel_link_m_n *m_n);

enum intel_display_power_domain intel_port_to_power_domain(enum port port);

enum intel_display_power_domain intel_port_to_power_domain(struct intel_digital_port *dig_port);

enum intel_display_power_domain

intel_aux_power_domain(struct intel_digital_port *dig_port);

enum intel_display_power_domain

intel_legacy_aux_to_power_domain(enum aux_ch aux_ch);

void intel_crtc_arm_fifo_underrun(struct intel_crtc *crtc,

				  struct intel_crtc_state *crtc_state);

void ilk_pfit_disable(const struct intel_crtc_state *old_crtc_state);