Commit 97807325 authored by Zhou Wang's avatar Zhou Wang Committed by Will Deacon
Browse files

drivers/perf: hisi: Permit modular builds of HiSilicon uncore drivers 



This patch lets HiSilicon uncore PMU driver can be built as modules.
A common module and three specific uncore PMU driver modules will be built.

Export necessary functions in hisi_uncore_pmu module, and change
irq_set_affinity to irq_set_affinity_hint to pass compile.

Signed-off-by: default avatarZhou Wang <wangzhou1@hisilicon.com>
Tested-by: default avatarQi Liu <liuqi115@huawei.com>
Reviewed-by: default avatarShaokun Zhang <zhangshaokun@hisilicon.com>
Link: https://lore.kernel.org/r/1588820305-174479-1-git-send-email-wangzhou1@hisilicon.com


Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent 88562f06

drivers/perf/Kconfig

+2 −7
Original line number Diff line number Diff line
@@ -79,13 +79,6 @@ config FSL_IMX8_DDR_PMU 
	  can give information about memory throughput and other related

	  events.



config HISI_PMU

       bool "HiSilicon SoC PMU"

       depends on ARM64 && ACPI

       help

         Support for HiSilicon SoC uncore performance monitoring

         unit (PMU), such as: L3C, HHA and DDRC.



config QCOM_L2_PMU

	bool "Qualcomm Technologies L2-cache PMU"

	depends on ARCH_QCOM && ARM64 && ACPI
@@ -129,4 +122,6 @@ config ARM_SPE_PMU 
	  Extension, which provides periodic sampling of operations in

	  the CPU pipeline and reports this via the perf AUX interface.



source "drivers/perf/hisilicon/Kconfig"



endmenu

drivers/perf/hisilicon/Kconfig

0 → 100644
+7 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0-only

config HISI_PMU

	tristate "HiSilicon SoC PMU drivers"

	depends on ARM64 && ACPI

	  help

	  Support for HiSilicon SoC L3 Cache performance monitor, Hydra Home

	  Agent performance monitor and DDR Controller performance monitor.

drivers/perf/hisilicon/Makefile

+2 −1
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0-only

obj-$(CONFIG_HISI_PMU) += hisi_uncore_pmu.o hisi_uncore_l3c_pmu.o hisi_uncore_hha_pmu.o hisi_uncore_ddrc_pmu.o
 
obj-$(CONFIG_HISI_PMU) += hisi_uncore_pmu.o hisi_uncore_l3c_pmu.o \

			  hisi_uncore_hha_pmu.o hisi_uncore_ddrc_pmu.o

drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c

+6 −4
Original line number Diff line number Diff line
@@ -394,8 +394,9 @@ static int hisi_ddrc_pmu_probe(struct platform_device *pdev) 
	ret = perf_pmu_register(&ddrc_pmu->pmu, name, -1);

	if (ret) {

		dev_err(ddrc_pmu->dev, "DDRC PMU register failed!\n");

		cpuhp_state_remove_instance(CPUHP_AP_PERF_ARM_HISI_DDRC_ONLINE,

					    &ddrc_pmu->node);

		cpuhp_state_remove_instance_nocalls(

			CPUHP_AP_PERF_ARM_HISI_DDRC_ONLINE, &ddrc_pmu->node);

		irq_set_affinity_hint(ddrc_pmu->irq, NULL);

	}



	return ret;
@@ -406,8 +407,9 @@ static int hisi_ddrc_pmu_remove(struct platform_device *pdev) 
	struct hisi_pmu *ddrc_pmu = platform_get_drvdata(pdev);



	perf_pmu_unregister(&ddrc_pmu->pmu);

	cpuhp_state_remove_instance(CPUHP_AP_PERF_ARM_HISI_DDRC_ONLINE,

	cpuhp_state_remove_instance_nocalls(CPUHP_AP_PERF_ARM_HISI_DDRC_ONLINE,

					    &ddrc_pmu->node);

	irq_set_affinity_hint(ddrc_pmu->irq, NULL);



	return 0;

}

drivers/perf/hisilicon/hisi_uncore_hha_pmu.c

+6 −4
Original line number Diff line number Diff line
@@ -406,8 +406,9 @@ static int hisi_hha_pmu_probe(struct platform_device *pdev) 
	ret = perf_pmu_register(&hha_pmu->pmu, name, -1);

	if (ret) {

		dev_err(hha_pmu->dev, "HHA PMU register failed!\n");

		cpuhp_state_remove_instance(CPUHP_AP_PERF_ARM_HISI_HHA_ONLINE,

					    &hha_pmu->node);

		cpuhp_state_remove_instance_nocalls(

			CPUHP_AP_PERF_ARM_HISI_HHA_ONLINE, &hha_pmu->node);

		irq_set_affinity_hint(hha_pmu->irq, NULL);

	}



	return ret;
@@ -418,8 +419,9 @@ static int hisi_hha_pmu_remove(struct platform_device *pdev) 
	struct hisi_pmu *hha_pmu = platform_get_drvdata(pdev);



	perf_pmu_unregister(&hha_pmu->pmu);

	cpuhp_state_remove_instance(CPUHP_AP_PERF_ARM_HISI_HHA_ONLINE,

	cpuhp_state_remove_instance_nocalls(CPUHP_AP_PERF_ARM_HISI_HHA_ONLINE,

					    &hha_pmu->node);

	irq_set_affinity_hint(hha_pmu->irq, NULL);



	return 0;

}