Commit 97791d3c authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'octeontx2-af-fixes' 



Hariprasad Kelam says:

====================
octeontx2-af: MAC block fixes for CN10KB

This patch set contains fixes for the issues encountered in testing
CN10KB MAC block RPM_USX.

Patch1: firmware to kernel communication is not working due to wrong
        interrupt configuration. CSR addresses are corrected.

Patch2: NIX to RVU PF mapping errors encountered due to wrong firmware
        config. Corrects this mapping error.

Patch3: Driver is trying to access non exist cgx/lmac which is resulting
        in kernel panic. Address this issue by adding proper checks.

Patch4: MAC features are not getting reset on FLR. Fix the issue by
        resetting the stale config.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents c97d3fb9 2e3e94c2

drivers/net/ethernet/marvell/octeontx2/af/cgx.c

+30 −3
Original line number Diff line number Diff line
@@ -169,6 +169,9 @@ void cgx_lmac_write(int cgx_id, int lmac_id, u64 offset, u64 val) 
{

	struct cgx *cgx_dev = cgx_get_pdata(cgx_id);



	/* Software must not access disabled LMAC registers */

	if (!is_lmac_valid(cgx_dev, lmac_id))

		return;

	cgx_write(cgx_dev, lmac_id, offset, val);

}
@@ -176,6 +179,10 @@ u64 cgx_lmac_read(int cgx_id, int lmac_id, u64 offset) 
{

	struct cgx *cgx_dev = cgx_get_pdata(cgx_id);



	/* Software must not access disabled LMAC registers */

	if (!is_lmac_valid(cgx_dev, lmac_id))

		return 0;



	return cgx_read(cgx_dev, lmac_id, offset);

}
@@ -530,14 +537,15 @@ static u32 cgx_get_lmac_fifo_len(void *cgxd, int lmac_id) 
int cgx_lmac_internal_loopback(void *cgxd, int lmac_id, bool enable)

{

	struct cgx *cgx = cgxd;

	u8 lmac_type;

	struct lmac *lmac;

	u64 cfg;



	if (!is_lmac_valid(cgx, lmac_id))

		return -ENODEV;



	lmac_type = cgx->mac_ops->get_lmac_type(cgx, lmac_id);

	if (lmac_type == LMAC_MODE_SGMII || lmac_type == LMAC_MODE_QSGMII) {

	lmac = lmac_pdata(lmac_id, cgx);

	if (lmac->lmac_type == LMAC_MODE_SGMII ||

	    lmac->lmac_type == LMAC_MODE_QSGMII) {

		cfg = cgx_read(cgx, lmac_id, CGXX_GMP_PCS_MRX_CTL);

		if (enable)

			cfg |= CGXX_GMP_PCS_MRX_CTL_LBK;
@@ -1556,6 +1564,23 @@ int cgx_lmac_linkup_start(void *cgxd) 
	return 0;

}



int cgx_lmac_reset(void *cgxd, int lmac_id, u8 pf_req_flr)

{

	struct cgx *cgx = cgxd;

	u64 cfg;



	if (!is_lmac_valid(cgx, lmac_id))

		return -ENODEV;



	/* Resetting PFC related CSRs */

	cfg = 0xff;

	cgx_write(cgxd, lmac_id, CGXX_CMRX_RX_LOGL_XON, cfg);



	if (pf_req_flr)

		cgx_lmac_internal_loopback(cgxd, lmac_id, false);

	return 0;

}



static int cgx_configure_interrupt(struct cgx *cgx, struct lmac *lmac,

				   int cnt, bool req_free)

{
@@ -1675,6 +1700,7 @@ static int cgx_lmac_init(struct cgx *cgx) 
		cgx->lmac_idmap[lmac->lmac_id] = lmac;

		set_bit(lmac->lmac_id, &cgx->lmac_bmap);

		cgx->mac_ops->mac_pause_frm_config(cgx, lmac->lmac_id, true);

		lmac->lmac_type = cgx->mac_ops->get_lmac_type(cgx, lmac->lmac_id);

	}



	return cgx_lmac_verify_fwi_version(cgx);
@@ -1771,6 +1797,7 @@ static struct mac_ops cgx_mac_ops = { 
	.mac_tx_enable =		cgx_lmac_tx_enable,

	.pfc_config =                   cgx_lmac_pfc_config,

	.mac_get_pfc_frm_cfg   =        cgx_lmac_get_pfc_frm_cfg,

	.mac_reset   =			cgx_lmac_reset,

};



static int cgx_probe(struct pci_dev *pdev, const struct pci_device_id *id)

drivers/net/ethernet/marvell/octeontx2/af/cgx.h

+2 −0
Original line number Diff line number Diff line
@@ -35,6 +35,7 @@ 
#define CGXX_CMRX_INT_ENA_W1S		0x058

#define CGXX_CMRX_RX_ID_MAP		0x060

#define CGXX_CMRX_RX_STAT0		0x070

#define CGXX_CMRX_RX_LOGL_XON		0x100

#define CGXX_CMRX_RX_LMACS		0x128

#define CGXX_CMRX_RX_DMAC_CTL0		(0x1F8 + mac_ops->csr_offset)

#define CGX_DMAC_CTL0_CAM_ENABLE	BIT_ULL(3)
@@ -181,4 +182,5 @@ int cgx_lmac_get_pfc_frm_cfg(void *cgxd, int lmac_id, u8 *tx_pause, 
			     u8 *rx_pause);

int verify_lmac_fc_cfg(void *cgxd, int lmac_id, u8 tx_pause, u8 rx_pause,

		       int pfvf_idx);

int cgx_lmac_reset(void *cgxd, int lmac_id, u8 pf_req_flr);

#endif /* CGX_H */

drivers/net/ethernet/marvell/octeontx2/af/lmac_common.h

+3 −0
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@ 
 * @cgx:		parent cgx port

 * @mcast_filters_count:  Number of multicast filters installed

 * @lmac_id:		lmac port id

 * @lmac_type:	        lmac type like SGMII/XAUI

 * @cmd_pend:		flag set before new command is started

 *			flag cleared after command response is received

 * @name:		lmac port name
@@ -43,6 +44,7 @@ struct lmac { 
	struct cgx *cgx;

	u8 mcast_filters_count;

	u8 lmac_id;

	u8 lmac_type;

	bool cmd_pend;

	char *name;

};
@@ -125,6 +127,7 @@ struct mac_ops { 


	int                     (*mac_get_pfc_frm_cfg)(void *cgxd, int lmac_id,

						       u8 *tx_pause, u8 *rx_pause);

	int			(*mac_reset)(void *cgxd, int lmac_id, u8 pf_req_flr);



	/* FEC stats */

	int			(*get_fec_stats)(void *cgxd, int lmac_id,

drivers/net/ethernet/marvell/octeontx2/af/rpm.c

+28 −4
Original line number Diff line number Diff line
@@ -37,6 +37,7 @@ static struct mac_ops rpm_mac_ops = { 
	.mac_tx_enable =		rpm_lmac_tx_enable,

	.pfc_config =                   rpm_lmac_pfc_config,

	.mac_get_pfc_frm_cfg   =        rpm_lmac_get_pfc_frm_cfg,

	.mac_reset   =			rpm_lmac_reset,

};



static struct mac_ops		rpm2_mac_ops   = {
@@ -47,7 +48,7 @@ static struct mac_ops rpm2_mac_ops = { 
	.int_set_reg    =       RPM2_CMRX_SW_INT_ENA_W1S,

	.irq_offset     =       1,

	.int_ena_bit    =       BIT_ULL(0),

	.lmac_fwi	=	RPM_LMAC_FWI,

	.lmac_fwi	=	RPM2_LMAC_FWI,

	.non_contiguous_serdes_lane = true,

	.rx_stats_cnt   =       43,

	.tx_stats_cnt   =       34,
@@ -68,6 +69,7 @@ static struct mac_ops rpm2_mac_ops = { 
	.mac_tx_enable =		rpm_lmac_tx_enable,

	.pfc_config =                   rpm_lmac_pfc_config,

	.mac_get_pfc_frm_cfg   =        rpm_lmac_get_pfc_frm_cfg,

	.mac_reset   =			rpm_lmac_reset,

};



bool is_dev_rpm2(void *rpmd)
@@ -537,14 +539,15 @@ u32 rpm2_get_lmac_fifo_len(void *rpmd, int lmac_id) 
int rpm_lmac_internal_loopback(void *rpmd, int lmac_id, bool enable)

{

	rpm_t *rpm = rpmd;

	u8 lmac_type;

	struct lmac *lmac;

	u64 cfg;



	if (!is_lmac_valid(rpm, lmac_id))

		return -ENODEV;

	lmac_type = rpm->mac_ops->get_lmac_type(rpm, lmac_id);



	if (lmac_type == LMAC_MODE_QSGMII || lmac_type == LMAC_MODE_SGMII) {

	lmac = lmac_pdata(lmac_id, rpm);

	if (lmac->lmac_type == LMAC_MODE_QSGMII ||

	    lmac->lmac_type == LMAC_MODE_SGMII) {

		dev_err(&rpm->pdev->dev, "loopback not supported for LPC mode\n");

		return 0;

	}
@@ -713,3 +716,24 @@ int rpm_get_fec_stats(void *rpmd, int lmac_id, struct cgx_fec_stats_rsp *rsp) 


	return 0;

}



int rpm_lmac_reset(void *rpmd, int lmac_id, u8 pf_req_flr)

{

	u64 rx_logl_xon, cfg;

	rpm_t *rpm = rpmd;



	if (!is_lmac_valid(rpm, lmac_id))

		return -ENODEV;



	/* Resetting PFC related CSRs */

	rx_logl_xon = is_dev_rpm2(rpm) ? RPM2_CMRX_RX_LOGL_XON :

					 RPMX_CMRX_RX_LOGL_XON;

	cfg = 0xff;



	rpm_write(rpm, lmac_id, rx_logl_xon, cfg);



	if (pf_req_flr)

		rpm_lmac_internal_loopback(rpm, lmac_id, false);



	return 0;

}

drivers/net/ethernet/marvell/octeontx2/af/rpm.h

+4 −1
Original line number Diff line number Diff line
@@ -74,6 +74,7 @@ 
#define RPMX_MTI_MAC100X_CL01_PAUSE_QUANTA              0x80A8

#define RPMX_MTI_MAC100X_CL89_PAUSE_QUANTA		0x8108

#define RPM_DEFAULT_PAUSE_TIME                          0x7FF

#define RPMX_CMRX_RX_LOGL_XON				0x4100



#define RPMX_MTI_MAC100X_XIF_MODE		        0x8100

#define RPMX_ONESTEP_ENABLE				BIT_ULL(5)
@@ -94,7 +95,8 @@ 


/* CN10KB CSR Declaration */

#define  RPM2_CMRX_SW_INT				0x1b0

#define  RPM2_CMRX_SW_INT_ENA_W1S			0x1b8

#define  RPM2_CMRX_SW_INT_ENA_W1S			0x1c8

#define  RPM2_LMAC_FWI					0x12

#define  RPM2_CMR_CHAN_MSK_OR				0x3120

#define  RPM2_CMR_RX_OVR_BP_EN				BIT_ULL(2)

#define  RPM2_CMR_RX_OVR_BP_BP				BIT_ULL(1)
@@ -131,4 +133,5 @@ int rpm_lmac_get_pfc_frm_cfg(void *rpmd, int lmac_id, u8 *tx_pause, 
int rpm2_get_nr_lmacs(void *rpmd);

bool is_dev_rpm2(void *rpmd);

int rpm_get_fec_stats(void *cgxd, int lmac_id, struct cgx_fec_stats_rsp *rsp);

int rpm_lmac_reset(void *rpmd, int lmac_id, u8 pf_req_flr);

#endif /* RPM_H */