Commit 97721c5e authored by Benjamin Gaignard's avatar Benjamin Gaignard Committed by Rob Herring
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dt-bindings: media: Convert stm32 dcmi bindings to json-schema



Convert the STM32 dcmi binding to DT schema format using json-schema

Signed-off-by: default avatarBenjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: default avatarRob Herring <robh@kernel.org>
parent 1c86b23d
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STMicroelectronics STM32 Digital Camera Memory Interface (DCMI)

Required properties:
- compatible: "st,stm32-dcmi"
- reg: physical base address and length of the registers set for the device
- interrupts: should contain IRQ line for the DCMI
- resets: reference to a reset controller,
          see Documentation/devicetree/bindings/reset/st,stm32-rcc.txt
- clocks: list of clock specifiers, corresponding to entries in
          the clock-names property
- clock-names: must contain "mclk", which is the DCMI peripherial clock
- pinctrl: the pincontrol settings to configure muxing properly
           for pins that connect to DCMI device.
           See Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml.
- dmas: phandle to DMA controller node,
        see Documentation/devicetree/bindings/dma/stm32-dma.txt
- dma-names: must contain "tx", which is the transmit channel from DCMI to DMA

DCMI supports a single port node with parallel bus. It should contain one
'port' child node with child 'endpoint' node. Please refer to the bindings
defined in Documentation/devicetree/bindings/media/video-interfaces.txt.

Example:

	dcmi: dcmi@50050000 {
		compatible = "st,stm32-dcmi";
		reg = <0x50050000 0x400>;
		interrupts = <78>;
		resets = <&rcc STM32F4_AHB2_RESET(DCMI)>;
		clocks = <&rcc 0 STM32F4_AHB2_CLOCK(DCMI)>;
		clock-names = "mclk";
		pinctrl-names = "default";
		pinctrl-0 = <&dcmi_pins>;
		dmas = <&dma2 1 1 0x414 0x3>;
		dma-names = "tx";
		port {
			dcmi_0: endpoint {
				remote-endpoint = <...>;
				bus-width = <8>;
				hsync-active = <0>;
				vsync-active = <0>;
				pclk-sample = <1>;
			};
		};
	};
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/st,stm32-dcmi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: STMicroelectronics STM32 Digital Camera Memory Interface (DCMI) binding

maintainers:
  - Hugues Fruchet <hugues.fruchet@st.com>

properties:
  compatible:
    const: st,stm32-dcmi

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    maxItems: 1

  clock-names:
    items:
      - const: mclk

  dmas:
    maxItems: 1

  dma-names:
    items:
      - const: tx

  resets:
    maxItems: 1

  port:
    type: object
    description:
      DCMI supports a single port node with parallel bus. It should contain
      one 'port' child node with child 'endpoint' node. Please refer to the
      bindings defined in
      Documentation/devicetree/bindings/media/video-interfaces.txt.

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - resets
  - dmas
  - dma-names
  - port

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/clock/stm32mp1-clks.h>
    #include <dt-bindings/reset/stm32mp1-resets.h>
    dcmi: dcmi@4c006000 {
        compatible = "st,stm32-dcmi";
        reg = <0x4c006000 0x400>;
        interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
        resets = <&rcc CAMITF_R>;
        clocks = <&rcc DCMI>;
        clock-names = "mclk";
        dmas = <&dmamux1 75 0x400 0x0d>;
        dma-names = "tx";

        port {
             dcmi_0: endpoint {
                   remote-endpoint = <&ov5640_0>;
                   bus-width = <8>;
                   hsync-active = <0>;
                   vsync-active = <0>;
                   pclk-sample = <1>;
             };
        };
    };

...