Unverified Commit 9722162f authored by Mark Brown's avatar Mark Brown
Browse files

Merge series "Support for Ingenic JZ47xx SPI controller" from Artur Rojek <contact@artur-rojek.eu>:

Hi,

This patchset introduces support for SPI controllers found in the
Ingenic JZ47xx family of SoCs. Of particular note, this allows to
replace GPIO backed SPI on the MIPS Creator CI20 board.

Mark:
Checkpatch generates a `need consistent spacing around '*'` error on
this patchset, however I believe this is a false positive due to it
confusing a pointer with multiplication operator inside a macro.

Rob:
I refrained from adding SPI pin groups into the bindings, as I felt that
would be enforcing a policy (SPI signals can be multiplexed on multiple
pin groups on the board, per use case). Instead, I included an example
pin configuration into the relevant commit description.

Other controllers already present in ci20.dts do specify their pin
groups, but I think this is bad practice. Do you have particular
guidelines on this?

Pavel:
Feel free to add your Tested-by, if you still have your CI20 setup
around :) I tested this driver with two SPI mode MMC/SD card readers and
also with the spi-loopback test driver.

Cheers,
Artur

Artur Rojek (2):
  SPI: add Ingenic JZ47xx driver.
  MIPS: JZ4780: CI20: DTS: add SPI controller config

Paul Cercueil (1):
  dt-bindings: spi: Document Ingenic SPI controller bindings

 .../devicetree/bindings/spi/ingenic,spi.yaml  |  72 +++
 arch/mips/boot/dts/ingenic/ci20.dts           |   9 +-
 arch/mips/boot/dts/ingenic/jz4780.dtsi        |  44 +-
 drivers/spi/Kconfig                           |   9 +
 drivers/spi/Makefile                          |   1 +
 drivers/spi/spi-ingenic.c                     | 482 ++++++++++++++++++
 6 files changed, 602 insertions(+), 15 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/spi/ingenic,spi.yaml
 create mode 100644 drivers/spi/spi-ingenic.c

--
2.33.0
parents 777a2cbb 7b3fd810
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+72 −0
Original line number Diff line number Diff line
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/spi/ingenic,spi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Ingenic SoCs SPI controller devicetree bindings

maintainers:
  - Artur Rojek <contact@artur-rojek.eu>
  - Paul Cercueil <paul@crapouillou.net>

allOf:
  - $ref: /schemas/spi/spi-controller.yaml#

properties:
  compatible:
    oneOf:
      - enum:
          - ingenic,jz4750-spi
          - ingenic,jz4780-spi
      - items:
          - enum:
              - ingenic,jz4760-spi
              - ingenic,jz4770-spi
          - const: ingenic,jz4750-spi

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    maxItems: 1

  dmas:
    maxItems: 2
    minItems: 2

  dma-names:
    items:
      - const: rx
      - const: tx

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - dmas
  - dma-names

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/jz4770-cgu.h>
    spi@10043000 {
      compatible = "ingenic,jz4770-spi", "ingenic,jz4750-spi";
      reg = <0x10043000 0x1c>;
      #address-cells = <1>;
      #size-cells = <0>;

      interrupt-parent = <&intc>;
      interrupts = <8>;

      clocks = <&cgu JZ4770_CLK_SSI0>;

      dmas = <&dmac1 23 0xffffffff>, <&dmac1 22 0xffffffff>;
      dma-names = "rx", "tx";
    };
+6 −3
Original line number Diff line number Diff line
@@ -113,9 +113,12 @@
	 * Use the 32.768 kHz oscillator as the parent of the RTC for a higher
	 * precision.
	 */
	assigned-clocks = <&cgu JZ4780_CLK_OTGPHY>, <&cgu JZ4780_CLK_RTC>;
	assigned-clock-parents = <0>, <&cgu JZ4780_CLK_RTCLK>;
	assigned-clock-rates = <48000000>;
	assigned-clocks = <&cgu JZ4780_CLK_OTGPHY>, <&cgu JZ4780_CLK_RTC>,
			  <&cgu JZ4780_CLK_SSIPLL>, <&cgu JZ4780_CLK_SSI>;
	assigned-clock-parents = <0>, <&cgu JZ4780_CLK_RTCLK>,
				 <&cgu JZ4780_CLK_MPLL>,
				 <&cgu JZ4780_CLK_SSIPLL>;
	assigned-clock-rates = <48000000>, <0>, <54000000>;
};

&tcu {
+32 −12
Original line number Diff line number Diff line
@@ -255,22 +255,23 @@
		};
	};

	spi_gpio {
		compatible = "spi-gpio";
	spi0: spi@10043000 {
		compatible = "ingenic,jz4780-spi";
		reg = <0x10043000 0x1c>;
		#address-cells = <1>;
		#size-cells = <0>;
		num-chipselects = <2>;

		gpio-miso = <&gpe 14 0>;
		gpio-sck = <&gpe 15 0>;
		gpio-mosi = <&gpe 17 0>;
		cs-gpios = <&gpe 16 0>, <&gpe 18 0>;
		interrupt-parent = <&intc>;
		interrupts = <8>;

		spidev@0 {
			compatible = "spidev";
			reg = <0>;
			spi-max-frequency = <1000000>;
		};
		clocks = <&cgu JZ4780_CLK_SSI0>;
		clock-names = "spi";

		dmas = <&dma JZ4780_DMA_SSI0_RX 0xffffffff>,
		       <&dma JZ4780_DMA_SSI0_TX 0xffffffff>;
		dma-names = "rx", "tx";

		status = "disabled";
	};

	uart0: serial@10030000 {
@@ -338,6 +339,25 @@
		status = "disabled";
	};

	spi1: spi@10044000 {
		compatible = "ingenic,jz4780-spi";
		reg = <0x10044000 0x1c>;
		#address-cells = <1>;
		#size-sells = <0>;

		interrupt-parent = <&intc>;
		interrupts = <7>;

		clocks = <&cgu JZ4780_CLK_SSI1>;
		clock-names = "spi";

		dmas = <&dma JZ4780_DMA_SSI1_RX 0xffffffff>,
		       <&dma JZ4780_DMA_SSI1_TX 0xffffffff>;
		dma-names = "rx", "tx";

		status = "disabled";
	};

	i2c0: i2c@10050000 {
		compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
		#address-cells = <1>;
+9 −0
Original line number Diff line number Diff line
@@ -406,6 +406,15 @@ config SPI_IMX
	help
	  This enables support for the Freescale i.MX SPI controllers.

config SPI_INGENIC
	tristate "Ingenic JZ47xx SoCs SPI controller"
	depends on MACH_INGENIC || COMPILE_TEST
	help
	  This enables support for the Ingenic JZ47xx SoCs SPI controller.

	  To compile this driver as a module, choose M here: the module
	  will be called spi-ingenic.

config SPI_JCORE
	tristate "J-Core SPI Master"
	depends on OF && (SUPERH || COMPILE_TEST)
+1 −0
Original line number Diff line number Diff line
@@ -59,6 +59,7 @@ obj-$(CONFIG_SPI_HISI_KUNPENG) += spi-hisi-kunpeng.o
obj-$(CONFIG_SPI_HISI_SFC_V3XX)		+= spi-hisi-sfc-v3xx.o
obj-$(CONFIG_SPI_IMG_SPFI)		+= spi-img-spfi.o
obj-$(CONFIG_SPI_IMX)			+= spi-imx.o
obj-$(CONFIG_SPI_INGENIC)		+= spi-ingenic.o
obj-$(CONFIG_SPI_LANTIQ_SSC)		+= spi-lantiq-ssc.o
obj-$(CONFIG_SPI_JCORE)			+= spi-jcore.o
obj-$(CONFIG_SPI_LM70_LLP)		+= spi-lm70llp.o
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