Commit 96cb8ae2 authored by Jiaxun Yang's avatar Jiaxun Yang Committed by Thomas Bogendoerfer
Browse files

MIPS: Rework smt cmdline parameters 



Provide a generic smt parameters interface aligned with s390
to allow users to limit smt usage and threads per core.

It replaced previous undocumented "nothreads" parameter for
smp-cps which is ambiguous and does not cover smp-mt.

Signed-off-by: default avatarJiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
parent dfbd992e

Documentation/admin-guide/kernel-parameters.txt

+2 −2
Original line number Diff line number Diff line
@@ -3838,7 +3838,7 @@ 
	nosmp		[SMP] Tells an SMP kernel to act as a UP kernel,

			and disable the IO APIC.  legacy for "maxcpus=0".



	nosmt		[KNL,S390] Disable symmetric multithreading (SMT).

	nosmt		[KNL,MIPS,S390] Disable symmetric multithreading (SMT).

			Equivalent to smt=1.



			[KNL,X86] Disable symmetric multithreading (SMT).
@@ -5735,7 +5735,7 @@ 
				1: Fast pin select (default)

				2: ATC IRMode



	smt=		[KNL,S390] Set the maximum number of threads (logical

	smt=		[KNL,MIPS,S390] Set the maximum number of threads (logical

			CPUs) to use per physical CPU on systems capable of

			symmetric multithreading (SMT). Will be capped to the

			actual hardware limit.

arch/mips/include/asm/smp.h

+2 −0
Original line number Diff line number Diff line
@@ -57,6 +57,8 @@ extern int __cpu_logical_map[NR_CPUS]; 
/* Mask of CPUs which are currently definitely operating coherently */

extern cpumask_t cpu_coherent_mask;



extern unsigned int smp_max_threads __initdata;



extern asmlinkage void smp_bootstrap(void);



extern void calculate_cpu_foreign_map(void);

arch/mips/kernel/smp-cps.c

+1 −12
Original line number Diff line number Diff line
@@ -25,24 +25,13 @@ 
#include <asm/time.h>

#include <asm/uasm.h>



static bool threads_disabled;

static DECLARE_BITMAP(core_power, NR_CPUS);



struct core_boot_config *mips_cps_core_bootcfg;



static int __init setup_nothreads(char *s)

{

	threads_disabled = true;

	return 0;

}

early_param("nothreads", setup_nothreads);



static unsigned core_vpe_count(unsigned int cluster, unsigned core)

{

	if (threads_disabled)

		return 1;



	return mips_cps_numvps(cluster, core);

	return min(smp_max_threads, mips_cps_numvps(cluster, core));

}



static void __init cps_smp_setup(void)

arch/mips/kernel/smp-mt.c

+2 −1
Original line number Diff line number Diff line
@@ -46,7 +46,8 @@ static void __init smvp_copy_vpe_config(void) 
static unsigned int __init smvp_vpe_init(unsigned int tc, unsigned int mvpconf0,

	unsigned int ncpu)

{

	if (tc > ((mvpconf0 & MVPCONF0_PVPE) >> MVPCONF0_PVPE_SHIFT))

	if (tc >= smp_max_threads ||

		(tc > ((mvpconf0 & MVPCONF0_PVPE) >> MVPCONF0_PVPE_SHIFT)))

		return ncpu;



	/* Deactivate all but VPE 0 */

arch/mips/kernel/smp.c

+18 −0
Original line number Diff line number Diff line
@@ -73,6 +73,24 @@ static cpumask_t cpu_core_setup_map; 


cpumask_t cpu_coherent_mask;



unsigned int smp_max_threads __initdata = UINT_MAX;



static int __init early_nosmt(char *s)

{

	smp_max_threads = 1;

	return 0;

}

early_param("nosmt", early_nosmt);



static int __init early_smt(char *s)

{

	get_option(&s, &smp_max_threads);

	/* Ensure at least one thread is available */

	smp_max_threads = clamp_val(smp_max_threads, 1U, UINT_MAX);

	return 0;

}

early_param("smt", early_smt);



#ifdef CONFIG_GENERIC_IRQ_IPI

static struct irq_desc *call_desc;

static struct irq_desc *sched_desc;