Commit 96bb736f authored by Bhupesh Sharma's avatar Bhupesh Sharma Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: Fix sdhci node names - use 'mmc@' 



Since the Qualcomm sdhci-msm device-tree binding has been converted
to yaml format, 'make dtbs_check' reports issues with
inconsistent 'sdhci@' convention used for specifying the
sdhci nodes. The generic mmc bindings expect 'mmc@' format
instead.

Fix the same.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: default avatarBhupesh Sharma <bhupesh.sharma@linaro.org>
[bjorn: Moved non-arm64 changes to separate commit]
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220514215424.1007718-2-bhupesh.sharma@linaro.org
parent dd764e1a

arch/arm64/boot/dts/qcom/ipq8074.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -375,7 +375,7 @@ 
			cell-index = <0>;

		};



		sdhc_1: sdhci@7824900 {

		sdhc_1: mmc@7824900 {

			compatible = "qcom,sdhci-msm-v4";

			reg = <0x7824900 0x500>, <0x7824000 0x800>;

			reg-names = "hc_mem", "core_mem";

arch/arm64/boot/dts/qcom/msm8916.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -1464,7 +1464,7 @@ 
			#sound-dai-cells = <1>;

		};



		sdhc_1: sdhci@7824000 {

		sdhc_1: mmc@7824000 {

			compatible = "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4";

			reg = <0x07824900 0x11c>, <0x07824000 0x800>;

			reg-names = "hc_mem", "core_mem";
@@ -1482,7 +1482,7 @@ 
			status = "disabled";

		};



		sdhc_2: sdhci@7864000 {

		sdhc_2: mmc@7864000 {

			compatible = "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4";

			reg = <0x07864900 0x11c>, <0x07864000 0x800>;

			reg-names = "hc_mem", "core_mem";

arch/arm64/boot/dts/qcom/msm8953.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -795,7 +795,7 @@ 
			};

		};



		sdhc_1: sdhci@7824900 {

		sdhc_1: mmc@7824900 {

			compatible = "qcom,msm8953-sdhci", "qcom,sdhci-msm-v4";



			reg = <0x7824900 0x500>, <0x7824000 0x800>;
@@ -855,7 +855,7 @@ 
			};

		};



		sdhc_2: sdhci@7864900 {

		sdhc_2: mmc@7864900 {

			compatible = "qcom,msm8953-sdhci", "qcom,sdhci-msm-v4";



			reg = <0x7864900 0x500>, <0x7864000 0x800>;

arch/arm64/boot/dts/qcom/msm8994.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -461,7 +461,7 @@ 
			};

		};



		sdhc1: sdhci@f9824900 {

		sdhc1: mmc@f9824900 {

			compatible = "qcom,msm8994-sdhci", "qcom,sdhci-msm-v4";

			reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>;

			reg-names = "hc_mem", "core_mem";
@@ -484,7 +484,7 @@ 
			status = "disabled";

		};



		sdhc2: sdhci@f98a4900 {

		sdhc2: mmc@f98a4900 {

			compatible = "qcom,msm8994-sdhci", "qcom,sdhci-msm-v4";

			reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;

			reg-names = "hc_mem", "core_mem";

arch/arm64/boot/dts/qcom/msm8996.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -2820,7 +2820,7 @@ 
			status = "disabled";

		};



		sdhc1: sdhci@7464900 {

		sdhc1: mmc@7464900 {

			compatible = "qcom,msm8996-sdhci", "qcom,sdhci-msm-v4";

			reg = <0x07464900 0x11c>, <0x07464000 0x800>;

			reg-names = "hc_mem", "core_mem";
@@ -2844,7 +2844,7 @@ 
			status = "disabled";

		};



		sdhc2: sdhci@74a4900 {

		sdhc2: mmc@74a4900 {

			compatible = "qcom,msm8996-sdhci", "qcom,sdhci-msm-v4";

			reg = <0x074a4900 0x314>, <0x074a4000 0x800>;

			reg-names = "hc_mem", "core_mem";