Commit 96321606 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/mspdec: switch to instanced constructor



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
Reviewed-by: default avatarLyude Paul <lyude@redhat.com>
parent e9e9a219
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+0 −2
Original line number Diff line number Diff line
@@ -60,7 +60,6 @@ struct nvkm_device {
		struct notifier_block nb;
	} acpi;

	struct nvkm_engine *mspdec;
	struct nvkm_engine *msppp;
	struct nvkm_engine *msvld;
	struct nvkm_nvenc *nvenc[3];
@@ -111,7 +110,6 @@ struct nvkm_device_chip {
#undef NVKM_LAYOUT_INST
#undef NVKM_LAYOUT_ONCE

	int (*mspdec  )(struct nvkm_device *, int idx, struct nvkm_engine **);
	int (*msppp   )(struct nvkm_device *, int idx, struct nvkm_engine **);
	int (*msvld   )(struct nvkm_device *, int idx, struct nvkm_engine **);
	int (*nvenc[3])(struct nvkm_device *, int idx, struct nvkm_nvenc **);
+1 −0
Original line number Diff line number Diff line
@@ -36,4 +36,5 @@ NVKM_LAYOUT_ONCE(NVKM_ENGINE_IFB , struct nvkm_engine , ifb)
NVKM_LAYOUT_ONCE(NVKM_ENGINE_ME      , struct nvkm_engine  ,       me)
NVKM_LAYOUT_ONCE(NVKM_ENGINE_MPEG    , struct nvkm_engine  ,     mpeg)
NVKM_LAYOUT_ONCE(NVKM_ENGINE_MSENC   , struct nvkm_engine  ,    msenc)
NVKM_LAYOUT_ONCE(NVKM_ENGINE_MSPDEC  , struct nvkm_engine  ,   mspdec)
NVKM_LAYOUT_ONCE(NVKM_ENGINE_VP      , struct nvkm_engine  ,       vp)
+4 −4
Original line number Diff line number Diff line
@@ -2,8 +2,8 @@
#ifndef __NVKM_MSPDEC_H__
#define __NVKM_MSPDEC_H__
#include <engine/falcon.h>
int g98_mspdec_new(struct nvkm_device *, int, struct nvkm_engine **);
int gt215_mspdec_new(struct nvkm_device *, int, struct nvkm_engine **);
int gf100_mspdec_new(struct nvkm_device *, int, struct nvkm_engine **);
int gk104_mspdec_new(struct nvkm_device *, int, struct nvkm_engine **);
int g98_mspdec_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_engine **);
int gt215_mspdec_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_engine **);
int gf100_mspdec_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_engine **);
int gk104_mspdec_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_engine **);
#endif
+0 −1
Original line number Diff line number Diff line
@@ -33,7 +33,6 @@ nvkm_subdev_type[NVKM_SUBDEV_NR] = {
#include <core/layout.h>
#undef NVKM_LAYOUT_ONCE
#undef NVKM_LAYOUT_INST
	[NVKM_ENGINE_MSPDEC  ] = "mspdec",
	[NVKM_ENGINE_MSPPP   ] = "msppp",
	[NVKM_ENGINE_MSVLD   ] = "msvld",
	[NVKM_ENGINE_NVENC0  ] = "nvenc0",
+23 −24
Original line number Diff line number Diff line
@@ -1098,7 +1098,7 @@ nv98_chipset = {
	.dma      = { 0x00000001, nv50_dma_new },
	.fifo     = { 0x00000001, g84_fifo_new },
	.gr       = { 0x00000001, g84_gr_new },
	.mspdec = g98_mspdec_new,
	.mspdec   = { 0x00000001, g98_mspdec_new },
	.msppp = g98_msppp_new,
	.msvld = g98_msvld_new,
	.pm = g84_pm_new,
@@ -1165,7 +1165,7 @@ nva3_chipset = {
	.fifo     = { 0x00000001, g84_fifo_new },
	.gr       = { 0x00000001, gt215_gr_new },
	.mpeg     = { 0x00000001, g84_mpeg_new },
	.mspdec = gt215_mspdec_new,
	.mspdec   = { 0x00000001, gt215_mspdec_new },
	.msppp = gt215_msppp_new,
	.msvld = gt215_msvld_new,
	.pm = gt215_pm_new,
@@ -1198,7 +1198,7 @@ nva5_chipset = {
	.dma      = { 0x00000001, nv50_dma_new },
	.fifo     = { 0x00000001, g84_fifo_new },
	.gr       = { 0x00000001, gt215_gr_new },
	.mspdec = gt215_mspdec_new,
	.mspdec   = { 0x00000001, gt215_mspdec_new },
	.msppp = gt215_msppp_new,
	.msvld = gt215_msvld_new,
	.pm = gt215_pm_new,
@@ -1231,7 +1231,7 @@ nva8_chipset = {
	.dma      = { 0x00000001, nv50_dma_new },
	.fifo     = { 0x00000001, g84_fifo_new },
	.gr       = { 0x00000001, gt215_gr_new },
	.mspdec = gt215_mspdec_new,
	.mspdec   = { 0x00000001, gt215_mspdec_new },
	.msppp = gt215_msppp_new,
	.msvld = gt215_msvld_new,
	.pm = gt215_pm_new,
@@ -1262,7 +1262,7 @@ nvaa_chipset = {
	.dma      = { 0x00000001, nv50_dma_new },
	.fifo     = { 0x00000001, g84_fifo_new },
	.gr       = { 0x00000001, gt200_gr_new },
	.mspdec = g98_mspdec_new,
	.mspdec   = { 0x00000001, g98_mspdec_new },
	.msppp = g98_msppp_new,
	.msvld = g98_msvld_new,
	.pm = g84_pm_new,
@@ -1294,7 +1294,7 @@ nvac_chipset = {
	.dma      = { 0x00000001, nv50_dma_new },
	.fifo     = { 0x00000001, g84_fifo_new },
	.gr       = { 0x00000001, mcp79_gr_new },
	.mspdec = g98_mspdec_new,
	.mspdec   = { 0x00000001, g98_mspdec_new },
	.msppp = g98_msppp_new,
	.msvld = g98_msvld_new,
	.pm = g84_pm_new,
@@ -1328,7 +1328,7 @@ nvaf_chipset = {
	.dma      = { 0x00000001, nv50_dma_new },
	.fifo     = { 0x00000001, g84_fifo_new },
	.gr       = { 0x00000001, mcp89_gr_new },
	.mspdec = gt215_mspdec_new,
	.mspdec   = { 0x00000001, gt215_mspdec_new },
	.msppp = gt215_msppp_new,
	.msvld = mcp89_msvld_new,
	.pm = gt215_pm_new,
@@ -1364,7 +1364,7 @@ nvc0_chipset = {
	.dma      = { 0x00000001, gf100_dma_new },
	.fifo     = { 0x00000001, gf100_fifo_new },
	.gr       = { 0x00000001, gf100_gr_new },
	.mspdec = gf100_mspdec_new,
	.mspdec   = { 0x00000001, gf100_mspdec_new },
	.msppp = gf100_msppp_new,
	.msvld = gf100_msvld_new,
	.pm = gf100_pm_new,
@@ -1400,7 +1400,7 @@ nvc1_chipset = {
	.dma      = { 0x00000001, gf100_dma_new },
	.fifo     = { 0x00000001, gf100_fifo_new },
	.gr       = { 0x00000001, gf108_gr_new },
	.mspdec = gf100_mspdec_new,
	.mspdec   = { 0x00000001, gf100_mspdec_new },
	.msppp = gf100_msppp_new,
	.msvld = gf100_msvld_new,
	.pm = gf108_pm_new,
@@ -1436,7 +1436,7 @@ nvc3_chipset = {
	.dma      = { 0x00000001, gf100_dma_new },
	.fifo     = { 0x00000001, gf100_fifo_new },
	.gr       = { 0x00000001, gf104_gr_new },
	.mspdec = gf100_mspdec_new,
	.mspdec   = { 0x00000001, gf100_mspdec_new },
	.msppp = gf100_msppp_new,
	.msvld = gf100_msvld_new,
	.pm = gf100_pm_new,
@@ -1472,7 +1472,7 @@ nvc4_chipset = {
	.dma      = { 0x00000001, gf100_dma_new },
	.fifo     = { 0x00000001, gf100_fifo_new },
	.gr       = { 0x00000001, gf104_gr_new },
	.mspdec = gf100_mspdec_new,
	.mspdec   = { 0x00000001, gf100_mspdec_new },
	.msppp = gf100_msppp_new,
	.msvld = gf100_msvld_new,
	.pm = gf100_pm_new,
@@ -1508,7 +1508,7 @@ nvc8_chipset = {
	.dma      = { 0x00000001, gf100_dma_new },
	.fifo     = { 0x00000001, gf100_fifo_new },
	.gr       = { 0x00000001, gf110_gr_new },
	.mspdec = gf100_mspdec_new,
	.mspdec   = { 0x00000001, gf100_mspdec_new },
	.msppp = gf100_msppp_new,
	.msvld = gf100_msvld_new,
	.pm = gf100_pm_new,
@@ -1544,7 +1544,7 @@ nvce_chipset = {
	.dma      = { 0x00000001, gf100_dma_new },
	.fifo     = { 0x00000001, gf100_fifo_new },
	.gr       = { 0x00000001, gf104_gr_new },
	.mspdec = gf100_mspdec_new,
	.mspdec   = { 0x00000001, gf100_mspdec_new },
	.msppp = gf100_msppp_new,
	.msvld = gf100_msvld_new,
	.pm = gf100_pm_new,
@@ -1580,7 +1580,7 @@ nvcf_chipset = {
	.dma      = { 0x00000001, gf100_dma_new },
	.fifo     = { 0x00000001, gf100_fifo_new },
	.gr       = { 0x00000001, gf104_gr_new },
	.mspdec = gf100_mspdec_new,
	.mspdec   = { 0x00000001, gf100_mspdec_new },
	.msppp = gf100_msppp_new,
	.msvld = gf100_msvld_new,
	.pm = gf100_pm_new,
@@ -1615,7 +1615,7 @@ nvd7_chipset = {
	.dma      = { 0x00000001, gf119_dma_new },
	.fifo     = { 0x00000001, gf100_fifo_new },
	.gr       = { 0x00000001, gf117_gr_new },
	.mspdec = gf100_mspdec_new,
	.mspdec   = { 0x00000001, gf100_mspdec_new },
	.msppp = gf100_msppp_new,
	.msvld = gf100_msvld_new,
	.pm = gf117_pm_new,
@@ -1651,7 +1651,7 @@ nvd9_chipset = {
	.dma      = { 0x00000001, gf119_dma_new },
	.fifo     = { 0x00000001, gf100_fifo_new },
	.gr       = { 0x00000001, gf119_gr_new },
	.mspdec = gf100_mspdec_new,
	.mspdec   = { 0x00000001, gf100_mspdec_new },
	.msppp = gf100_msppp_new,
	.msvld = gf100_msvld_new,
	.pm = gf117_pm_new,
@@ -1688,7 +1688,7 @@ nve4_chipset = {
	.dma      = { 0x00000001, gf119_dma_new },
	.fifo     = { 0x00000001, gk104_fifo_new },
	.gr       = { 0x00000001, gk104_gr_new },
	.mspdec = gk104_mspdec_new,
	.mspdec   = { 0x00000001, gk104_mspdec_new },
	.msppp = gf100_msppp_new,
	.msvld = gk104_msvld_new,
	.pm = gk104_pm_new,
@@ -1725,7 +1725,7 @@ nve6_chipset = {
	.dma      = { 0x00000001, gf119_dma_new },
	.fifo     = { 0x00000001, gk104_fifo_new },
	.gr       = { 0x00000001, gk104_gr_new },
	.mspdec = gk104_mspdec_new,
	.mspdec   = { 0x00000001, gk104_mspdec_new },
	.msppp = gf100_msppp_new,
	.msvld = gk104_msvld_new,
	.pm = gk104_pm_new,
@@ -1762,7 +1762,7 @@ nve7_chipset = {
	.dma      = { 0x00000001, gf119_dma_new },
	.fifo     = { 0x00000001, gk104_fifo_new },
	.gr       = { 0x00000001, gk104_gr_new },
	.mspdec = gk104_mspdec_new,
	.mspdec   = { 0x00000001, gk104_mspdec_new },
	.msppp = gf100_msppp_new,
	.msvld = gk104_msvld_new,
	.pm = gk104_pm_new,
@@ -1824,7 +1824,7 @@ nvf0_chipset = {
	.dma      = { 0x00000001, gf119_dma_new },
	.fifo     = { 0x00000001, gk110_fifo_new },
	.gr       = { 0x00000001, gk110_gr_new },
	.mspdec = gk104_mspdec_new,
	.mspdec   = { 0x00000001, gk104_mspdec_new },
	.msppp = gf100_msppp_new,
	.msvld = gk104_msvld_new,
	.sw = gf100_sw_new,
@@ -1860,7 +1860,7 @@ nvf1_chipset = {
	.dma      = { 0x00000001, gf119_dma_new },
	.fifo     = { 0x00000001, gk110_fifo_new },
	.gr       = { 0x00000001, gk110b_gr_new },
	.mspdec = gk104_mspdec_new,
	.mspdec   = { 0x00000001, gk104_mspdec_new },
	.msppp = gf100_msppp_new,
	.msvld = gk104_msvld_new,
	.sw = gf100_sw_new,
@@ -1896,7 +1896,7 @@ nv106_chipset = {
	.dma      = { 0x00000001, gf119_dma_new },
	.fifo     = { 0x00000001, gk208_fifo_new },
	.gr       = { 0x00000001, gk208_gr_new },
	.mspdec = gk104_mspdec_new,
	.mspdec   = { 0x00000001, gk104_mspdec_new },
	.msppp = gf100_msppp_new,
	.msvld = gk104_msvld_new,
	.sw = gf100_sw_new,
@@ -1932,7 +1932,7 @@ nv108_chipset = {
	.dma      = { 0x00000001, gf119_dma_new },
	.fifo     = { 0x00000001, gk208_fifo_new },
	.gr       = { 0x00000001, gk208_gr_new },
	.mspdec = gk104_mspdec_new,
	.mspdec   = { 0x00000001, gk104_mspdec_new },
	.msppp = gf100_msppp_new,
	.msvld = gk104_msvld_new,
	.sw = gf100_sw_new,
@@ -3174,7 +3174,6 @@ nvkm_device_ctor(const struct nvkm_device_func *func,
#include <core/layout.h>
#undef NVKM_LAYOUT_INST
#undef NVKM_LAYOUT_ONCE
		_(NVKM_ENGINE_MSPDEC  ,   mspdec);
		_(NVKM_ENGINE_MSPPP   ,    msppp);
		_(NVKM_ENGINE_MSVLD   ,    msvld);
		_(NVKM_ENGINE_NVENC0  , nvenc[0]);
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