Commit 96236912 authored by Huacai Chen's avatar Huacai Chen
Browse files

LoongArch: Fix perf event id calculation 



LoongArch PMCFG has 10bit event id rather than 8 bit, so fix it.

Cc: stable@vger.kernel.org
Signed-off-by: default avatarJun Yi <yijun@loongson.cn>
Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
parent 346dc929

arch/loongarch/kernel/perf_event.c

+3 −3
Original line number Diff line number Diff line
@@ -271,7 +271,7 @@ static void loongarch_pmu_enable_event(struct hw_perf_event *evt, int idx) 
	WARN_ON(idx < 0 || idx >= loongarch_pmu.num_counters);



	/* Make sure interrupt enabled. */

	cpuc->saved_ctrl[idx] = M_PERFCTL_EVENT(evt->event_base & 0xff) |

	cpuc->saved_ctrl[idx] = M_PERFCTL_EVENT(evt->event_base) |

		(evt->config_base & M_PERFCTL_CONFIG_MASK) | CSR_PERFCTRL_IE;



	cpu = (event->cpu >= 0) ? event->cpu : smp_processor_id();
@@ -594,7 +594,7 @@ static struct pmu pmu = { 


static unsigned int loongarch_pmu_perf_event_encode(const struct loongarch_perf_event *pev)

{

	return (pev->event_id & 0xff);

	return M_PERFCTL_EVENT(pev->event_id);

}



static const struct loongarch_perf_event *loongarch_pmu_map_general_event(int idx)
@@ -849,7 +849,7 @@ static void resume_local_counters(void) 


static const struct loongarch_perf_event *loongarch_pmu_map_raw_event(u64 config)

{

	raw_event.event_id = config & 0xff;

	raw_event.event_id = M_PERFCTL_EVENT(config);



	return &raw_event;

}