Commit 95fe2253 authored by Nicolas Toromanoff's avatar Nicolas Toromanoff Committed by Herbert Xu
Browse files

crypto: stm32/cryp - reorder hw initialization 



The CRYP IP checks the written key depending of the configuration, it's
safer to write the whole configuration to hardware then the key to avoid
unexpected key rejection.

Signed-off-by: default avatarNicolas Toromanoff <nicolas.toromanoff@foss.st.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 4b898d5c

drivers/crypto/stm32/stm32-cryp.c

+26 −13
Original line number Diff line number Diff line
@@ -232,6 +232,11 @@ static inline int stm32_cryp_wait_busy(struct stm32_cryp *cryp) 
			!(status & SR_BUSY), 10, 100000);

}



static inline void stm32_cryp_enable(struct stm32_cryp *cryp)

{

	writel_relaxed(readl_relaxed(cryp->regs + CRYP_CR) | CR_CRYPEN, cryp->regs + CRYP_CR);

}



static inline int stm32_cryp_wait_enable(struct stm32_cryp *cryp)

{

	u32 status;
@@ -534,9 +539,6 @@ static int stm32_cryp_hw_init(struct stm32_cryp *cryp) 
	/* Disable interrupt */

	stm32_cryp_write(cryp, CRYP_IMSCR, 0);



	/* Set key */

	stm32_cryp_hw_write_key(cryp);



	/* Set configuration */

	cfg = CR_DATA8 | CR_FFLUSH;
@@ -562,24 +564,37 @@ static int stm32_cryp_hw_init(struct stm32_cryp *cryp) 
	/* AES ECB/CBC decrypt: run key preparation first */

	if (is_decrypt(cryp) &&

	    ((hw_mode == CR_AES_ECB) || (hw_mode == CR_AES_CBC))) {

		stm32_cryp_write(cryp, CRYP_CR, cfg | CR_AES_KP | CR_CRYPEN);

		/* Configure in key preparation mode */

		stm32_cryp_write(cryp, CRYP_CR, cfg | CR_AES_KP);



		/* Set key only after full configuration done */

		stm32_cryp_hw_write_key(cryp);



		/* Start prepare key */

		stm32_cryp_enable(cryp);

		/* Wait for end of processing */

		ret = stm32_cryp_wait_busy(cryp);

		if (ret) {

			dev_err(cryp->dev, "Timeout (key preparation)\n");

			return ret;

		}

	}



	cfg |= hw_mode;

		cfg |= hw_mode | CR_DEC_NOT_ENC;



		/* Apply updated config (Decrypt + algo) and flush */

		stm32_cryp_write(cryp, CRYP_CR, cfg);

	} else {

		cfg |= hw_mode;

		if (is_decrypt(cryp))

			cfg |= CR_DEC_NOT_ENC;



	/* Apply config and flush (valid when CRYPEN = 0) */

		/* Apply config and flush */

		stm32_cryp_write(cryp, CRYP_CR, cfg);



		/* Set key only after configuration done */

		stm32_cryp_hw_write_key(cryp);

	}



	switch (hw_mode) {

	case CR_AES_GCM:

	case CR_AES_CCM:
@@ -606,9 +621,7 @@ static int stm32_cryp_hw_init(struct stm32_cryp *cryp) 
	}



	/* Enable now */

	cfg |= CR_CRYPEN;



	stm32_cryp_write(cryp, CRYP_CR, cfg);

	stm32_cryp_enable(cryp);



	return 0;

}