Commit 95bf387e authored by David S. Miller's avatar David S. Miller
Browse files

Merge tag 'mlx5-updates-2021-10-04' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux 



Saeed Mahameed says:

====================
mlx5-updates-2021-10-04

Misc updates for mlx5 driver

1) Add TX max rate support for MQPRIO channel mode
2) Trivial TC action and modify header refactoring
3) TC support for accept action in fdb offloads
4) Allow single IRQ for PCI functions

5) Bridge offload: Pop PVID VLAN header on egress miss

Vlad Buslov says:
=================

With current architecture of mlx5 bridge offload it is possible for a
packet to match in ingress table by source MAC (resulting VLAN header push
in case of port with configured PVID) and then miss in egress table when
destination MAC is not in FDB. Due to the lack of hardware learning in
NICs, this, in turn, results packet going to software data path with PVID
VLAN already added by hardware. This doesn't break software bridge since it
accepts either untagged packets or packets with any provisioned VLAN on
ports with PVID, but can break ingress TC, if affected part of Ethernet
header is matched by classifier.

Improve compatibility with software TC by restoring the packet header on
egress miss. Effectively, this change implements atomicity of mlx5 bridge
offload implementation - packet is either modified and redirected to
destination port or appears unmodified in software.

=================

=================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 45c9d966 f891b7cd

drivers/infiniband/hw/mlx5/odp.c

+1 −0
Original line number Diff line number Diff line
@@ -1559,6 +1559,7 @@ int mlx5r_odp_create_eq(struct mlx5_ib_dev *dev, struct mlx5_ib_pf_eq *eq) 


	eq->irq_nb.notifier_call = mlx5_ib_eq_pf_int;

	param = (struct mlx5_eq_param) {

		.irq_index = MLX5_IRQ_EQ_CTRL,

		.nent = MLX5_IB_NUM_PF_EQE,

	};

	param.mask[0] = 1ull << MLX5_EVENT_TYPE_PAGE_FAULT;

drivers/net/ethernet/mellanox/mlx5/core/en.h

+6 −1
Original line number Diff line number Diff line
@@ -251,6 +251,9 @@ struct mlx5e_params { 
		u16 mode;

		u8 num_tc;

		struct netdev_tc_txq tc_to_txq[TC_MAX_QUEUE];

		struct {

			struct mlx5e_mqprio_rl *rl;

		} channel;

	} mqprio;

	bool rx_cqe_compress_def;

	bool tunneled_offload_en;
@@ -877,6 +880,7 @@ struct mlx5e_priv { 
#endif

	struct mlx5e_scratchpad    scratchpad;

	struct mlx5e_htb           htb;

	struct mlx5e_mqprio_rl    *mqprio_rl;

};



struct mlx5e_rx_handlers {
@@ -1002,7 +1006,8 @@ int mlx5e_modify_sq(struct mlx5_core_dev *mdev, u32 sqn, 
		    struct mlx5e_modify_sq_param *p);

int mlx5e_open_txqsq(struct mlx5e_channel *c, u32 tisn, int txq_ix,

		     struct mlx5e_params *params, struct mlx5e_sq_param *param,

		     struct mlx5e_txqsq *sq, int tc, u16 qos_queue_group_id, u16 qos_qid);

		     struct mlx5e_txqsq *sq, int tc, u16 qos_queue_group_id,

		     struct mlx5e_sq_stats *sq_stats);

void mlx5e_activate_txqsq(struct mlx5e_txqsq *sq);

void mlx5e_deactivate_txqsq(struct mlx5e_txqsq *sq);

void mlx5e_free_txqsq(struct mlx5e_txqsq *sq);

drivers/net/ethernet/mellanox/mlx5/core/en/qos.c

+101 −1
Original line number Diff line number Diff line
@@ -7,6 +7,21 @@ 


#define BYTES_IN_MBIT 125000



int mlx5e_qos_bytes_rate_check(struct mlx5_core_dev *mdev, u64 nbytes)

{

	if (nbytes < BYTES_IN_MBIT) {

		qos_warn(mdev, "Input rate (%llu Bytes/sec) below minimum supported (%u Bytes/sec)\n",

			 nbytes, BYTES_IN_MBIT);

		return -EINVAL;

	}

	return 0;

}



static u32 mlx5e_qos_bytes2mbits(struct mlx5_core_dev *mdev, u64 nbytes)

{

	return div_u64(nbytes, BYTES_IN_MBIT);

}



int mlx5e_qos_max_leaf_nodes(struct mlx5_core_dev *mdev)

{

	return min(MLX5E_QOS_MAX_LEAF_NODES, mlx5_qos_max_leaf_nodes(mdev));
@@ -238,7 +253,8 @@ static int mlx5e_open_qos_sq(struct mlx5e_priv *priv, struct mlx5e_channels *chs 
	if (err)

		goto err_free_sq;

	err = mlx5e_open_txqsq(c, priv->tisn[c->lag_port][0], txq_ix, params,

			       &param_sq, sq, 0, node->hw_id, node->qid);

			       &param_sq, sq, 0, node->hw_id,

			       priv->htb.qos_sq_stats[node->qid]);

	if (err)

		goto err_close_cq;
@@ -979,3 +995,87 @@ int mlx5e_htb_node_modify(struct mlx5e_priv *priv, u16 classid, u64 rate, u64 ce 


	return err;

}



struct mlx5e_mqprio_rl {

	struct mlx5_core_dev *mdev;

	u32 root_id;

	u32 *leaves_id;

	u8 num_tc;

};



struct mlx5e_mqprio_rl *mlx5e_mqprio_rl_alloc(void)

{

	return kvzalloc(sizeof(struct mlx5e_mqprio_rl), GFP_KERNEL);

}



void mlx5e_mqprio_rl_free(struct mlx5e_mqprio_rl *rl)

{

	kvfree(rl);

}



int mlx5e_mqprio_rl_init(struct mlx5e_mqprio_rl *rl, struct mlx5_core_dev *mdev, u8 num_tc,

			 u64 max_rate[])

{

	int err;

	int tc;



	if (!mlx5_qos_is_supported(mdev)) {

		qos_warn(mdev, "Missing QoS capabilities. Try disabling SRIOV or use a supported device.");

		return -EOPNOTSUPP;

	}

	if (num_tc > mlx5e_qos_max_leaf_nodes(mdev))

		return -EINVAL;



	rl->mdev = mdev;

	rl->num_tc = num_tc;

	rl->leaves_id = kvcalloc(num_tc, sizeof(*rl->leaves_id), GFP_KERNEL);

	if (!rl->leaves_id)

		return -ENOMEM;



	err = mlx5_qos_create_root_node(mdev, &rl->root_id);

	if (err)

		goto err_free_leaves;



	qos_dbg(mdev, "Root created, id %#x\n", rl->root_id);



	for (tc = 0; tc < num_tc; tc++) {

		u32 max_average_bw;



		max_average_bw = mlx5e_qos_bytes2mbits(mdev, max_rate[tc]);

		err = mlx5_qos_create_leaf_node(mdev, rl->root_id, 0, max_average_bw,

						&rl->leaves_id[tc]);

		if (err)

			goto err_destroy_leaves;



		qos_dbg(mdev, "Leaf[%d] created, id %#x, max average bw %u Mbits/sec\n",

			tc, rl->leaves_id[tc], max_average_bw);

	}

	return 0;



err_destroy_leaves:

	while (--tc >= 0)

		mlx5_qos_destroy_node(mdev, rl->leaves_id[tc]);

	mlx5_qos_destroy_node(mdev, rl->root_id);

err_free_leaves:

	kvfree(rl->leaves_id);

	return err;

}



void mlx5e_mqprio_rl_cleanup(struct mlx5e_mqprio_rl *rl)

{

	int tc;



	for (tc = 0; tc < rl->num_tc; tc++)

		mlx5_qos_destroy_node(rl->mdev, rl->leaves_id[tc]);

	mlx5_qos_destroy_node(rl->mdev, rl->root_id);

	kvfree(rl->leaves_id);

}



int mlx5e_mqprio_rl_get_node_hw_id(struct mlx5e_mqprio_rl *rl, int tc, u32 *hw_id)

{

	if (tc >= rl->num_tc)

		return -EINVAL;



	*hw_id = rl->leaves_id[tc];

	return 0;

}

drivers/net/ethernet/mellanox/mlx5/core/en/qos.h

+9 −0
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ struct mlx5e_priv; 
struct mlx5e_channels;

struct mlx5e_channel;



int mlx5e_qos_bytes_rate_check(struct mlx5_core_dev *mdev, u64 nbytes);

int mlx5e_qos_max_leaf_nodes(struct mlx5_core_dev *mdev);

int mlx5e_qos_cur_leaf_nodes(struct mlx5e_priv *priv);
@@ -41,4 +42,12 @@ int mlx5e_htb_leaf_del_last(struct mlx5e_priv *priv, u16 classid, bool force, 
int mlx5e_htb_node_modify(struct mlx5e_priv *priv, u16 classid, u64 rate, u64 ceil,

			  struct netlink_ext_ack *extack);



/* MQPRIO TX rate limit */

struct mlx5e_mqprio_rl;

struct mlx5e_mqprio_rl *mlx5e_mqprio_rl_alloc(void);

void mlx5e_mqprio_rl_free(struct mlx5e_mqprio_rl *rl);

int mlx5e_mqprio_rl_init(struct mlx5e_mqprio_rl *rl, struct mlx5_core_dev *mdev, u8 num_tc,

			 u64 max_rate[]);

void mlx5e_mqprio_rl_cleanup(struct mlx5e_mqprio_rl *rl);

int mlx5e_mqprio_rl_get_node_hw_id(struct mlx5e_mqprio_rl *rl, int tc, u32 *hw_id);

#endif

drivers/net/ethernet/mellanox/mlx5/core/en/tc/sample.c

+5 −16
Original line number Diff line number Diff line
@@ -602,7 +602,7 @@ mlx5e_tc_sample_offload(struct mlx5e_tc_psample *tc_psample, 
	}

	sample_flow->pre_attr = pre_attr;



	return sample_flow->post_rule;

	return sample_flow->pre_rule;



err_pre_offload_rule:

	kfree(pre_attr);
@@ -613,7 +613,7 @@ mlx5e_tc_sample_offload(struct mlx5e_tc_psample *tc_psample, 
err_obj_id:

	sampler_put(tc_psample, sample_flow->sampler);

err_sampler:

	if (!post_act_handle)

	if (sample_flow->post_rule)

		del_post_rule(esw, sample_flow, attr);

err_post_rule:

	if (post_act_handle)
@@ -628,9 +628,7 @@ mlx5e_tc_sample_unoffload(struct mlx5e_tc_psample *tc_psample, 
			  struct mlx5_flow_handle *rule,

			  struct mlx5_flow_attr *attr)

{

	struct mlx5_esw_flow_attr *esw_attr = attr->esw_attr;

	struct mlx5e_sample_flow *sample_flow;

	struct mlx5_vport_tbl_attr tbl_attr;

	struct mlx5_eswitch *esw;



	if (IS_ERR_OR_NULL(tc_psample))
@@ -650,23 +648,14 @@ mlx5e_tc_sample_unoffload(struct mlx5e_tc_psample *tc_psample, 
	 */

	sample_flow = attr->sample_attr->sample_flow;

	mlx5_eswitch_del_offloaded_rule(esw, sample_flow->pre_rule, sample_flow->pre_attr);

	if (!sample_flow->post_act_handle)

		mlx5_eswitch_del_offloaded_rule(esw, sample_flow->post_rule,

						sample_flow->post_attr);



	sample_restore_put(tc_psample, sample_flow->restore);

	mapping_remove(esw->offloads.reg_c0_obj_pool, attr->sample_attr->restore_obj_id);

	sampler_put(tc_psample, sample_flow->sampler);

	if (sample_flow->post_act_handle) {

	if (sample_flow->post_act_handle)

		mlx5e_tc_post_act_del(tc_psample->post_act, sample_flow->post_act_handle);

	} else {

		tbl_attr.chain = attr->chain;

		tbl_attr.prio = attr->prio;

		tbl_attr.vport = esw_attr->in_rep->vport;

		tbl_attr.vport_ns = &mlx5_esw_vport_tbl_sample_ns;

		mlx5_esw_vporttbl_put(esw, &tbl_attr);

		kfree(sample_flow->post_attr);

	}

	else

		del_post_rule(esw, sample_flow, attr);



	kfree(sample_flow->pre_attr);

	kfree(sample_flow);