Commit 95bd315f authored by Guillaume Ranquet's avatar Guillaume Ranquet Committed by Vinod Koul
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phy: mediatek: hdmi: mt8195: fix prediv bad upper limit test 



The pll prediv calculus searchs for the smallest prediv that gets
the ns_hdmipll_ck in the range of 5 GHz to 12 GHz.

A typo in the upper bound test was testing for 5Ghz to 1Ghz

Fixes: 45810d48 ("phy: mediatek: add support for phy-mtk-hdmi-mt8195")
Signed-off-by: default avatarGuillaume Ranquet <granquet@baylibre.com>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230529-hdmi_phy_fix-v1-1-bf65f53af533@baylibre.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 5782017c

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

+1 −1
Original line number Diff line number Diff line
@@ -253,7 +253,7 @@ static int mtk_hdmi_pll_calc(struct mtk_hdmi_phy *hdmi_phy, struct clk_hw *hw, 
	for (i = 0; i < ARRAY_SIZE(txpredivs); i++) {

		ns_hdmipll_ck = 5 * tmds_clk * txposdiv * txpredivs[i];

		if (ns_hdmipll_ck >= 5 * GIGA &&

		    ns_hdmipll_ck <= 1 * GIGA)

		    ns_hdmipll_ck <= 12 * GIGA)

			break;

	}

	if (i == (ARRAY_SIZE(txpredivs) - 1) &&