Unverified Commit 95bc6947 authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
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!13843 Add support for FEAT_HAFT

Merge Pull Request from: @xiao_jiang_shui 
 
This series adds basic support for FEAT_HAFT introduced in Armv8.9/v9.4
and enable ARCH_HAS_NONLEAF_PMD_YOUNG. The latter will be used in
lru-gen aging. Tested with lru-gen in below steps:

1. Generate a 1GiB workingset by stress-ng --vm 1. Then hang the task to
stop accessing the memory. (AF bit won't be updated)
2. try to age the memory by /sys/kernel/debug/lru_gen

Run above steps with LRU_GEN_NONLEAF_YOUNG(0x4) and not respectively
(switching by /sys/kernel/mm/lru_gen/enabled). LRU_GEN_NONLEAF_YOUNG
will clear and test the PMD AF bit on page walking for aging,
otherwise will clear and test the PTE AF bit for aging. In this case
LRU_GEN_NONLEAF_YOUNG will improve the efficiency of page scanning
since pages won't be accessed and we don't need to scan each PTE.
Observed ~40% time saved for 1GiB memory on our emulated platform
with LRU_GEN_NONLEAF_YOUNG.

issue:https://gitee.com/openeuler/kernel/issues/IB4YD4 
 
Link:https://gitee.com/openeuler/kernel/pulls/13843

 

Reviewed-by: default avatarZhang Jianhua <chris.zjh@huawei.com>
Reviewed-by: default avatarKefeng Wang <wangkefeng.wang@huawei.com>
Reviewed-by: default avatarLiu Chao <liuchao173@huawei.com>
Signed-off-by: default avatarZhang Peng <zhangpeng362@huawei.com>
parents 321262d8 9af0c56c
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+16 −0
Original line number Diff line number Diff line
@@ -35,6 +35,7 @@ config ARM64
	select ARCH_HAS_MEMBARRIER_SYNC_CORE
	select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS
	select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE
	select ARCH_HAS_NONLEAF_PMD_YOUNG if ARM64_HAFT
	select ARCH_HAS_PTE_DEVMAP
	select ARCH_HAS_PTE_SPECIAL
	select ARCH_HAS_SETUP_DMA_OPS
@@ -2311,6 +2312,21 @@ config ARM64_NMI
	  if the cpu does not implement the feature. It will also be
	  disabled if pseudo NMIs are enabled at runtime.

config ARM64_HAFT
	bool "Support for Hardware managed Access Flag for Table Descriptors"
	depends on ARM64_HW_AFDBM
	default y
	help
	  The ARMv8.9/ARMv9.5 introduces the feature Hardware managed Access
	  Flag for Table descriptors. When enabled an architectural executed
	  memory access will update the Access Flag in each Table descriptor
	  which is accessed during the translation table walk and for which
	  the Access Flag is 0. The Access Flag of the Table descriptor use
	  the same bit of PTE_AF.

	  The feature will only be enabled if all the CPUs in the system
	  support this feature. If unsure, say Y.

endmenu # "ARMv8.8 architectural features"

config ARM64_SVE
+2 −0
Original line number Diff line number Diff line
@@ -1203,6 +1203,7 @@ CONFIG_USERSWAP=y
CONFIG_LRU_GEN=y
# CONFIG_LRU_GEN_ENABLED is not set
# CONFIG_LRU_GEN_STATS is not set
CONFIG_ARM64_HAFT=y
CONFIG_ARCH_SUPPORTS_PER_VMA_LOCK=y
CONFIG_PER_VMA_LOCK=y
CONFIG_LOCK_MM_AND_FIND_VMA=y
@@ -7832,6 +7833,7 @@ CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y
CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y
CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y
CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y
CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG=y
CONFIG_SWIOTLB=y
# CONFIG_SWIOTLB_DYNAMIC is not set
CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC=y
+6 −0
Original line number Diff line number Diff line
@@ -860,6 +860,12 @@ static inline bool cpus_support_mpam(void)

bool mpam_detect_is_enabled(void);

static inline bool system_supports_haft(void)
{
	return IS_ENABLED(CONFIG_ARM64_HAFT) &&
		cpus_have_final_cap(ARM64_HAFT);
}

int do_emulate_mrs(struct pt_regs *regs, u32 sys_reg, u32 rt);
bool try_emulate_mrs(struct pt_regs *regs, u32 isn);

+6 −4
Original line number Diff line number Diff line
@@ -27,7 +27,7 @@ static inline void __pud_populate(pud_t *pudp, phys_addr_t pmdp, pudval_t prot)

static inline void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmdp)
{
	pudval_t pudval = PUD_TYPE_TABLE;
	pudval_t pudval = PUD_TYPE_TABLE | PUD_TABLE_AF;

	pudval |= (mm == &init_mm) ? PUD_TABLE_UXN : PUD_TABLE_PXN;
	__pud_populate(pudp, __pa(pmdp), pudval);
@@ -48,7 +48,7 @@ static inline void __p4d_populate(p4d_t *p4dp, phys_addr_t pudp, p4dval_t prot)

static inline void p4d_populate(struct mm_struct *mm, p4d_t *p4dp, pud_t *pudp)
{
	p4dval_t p4dval = P4D_TYPE_TABLE;
	p4dval_t p4dval = P4D_TYPE_TABLE | P4D_TABLE_AF;

	p4dval |= (mm == &init_mm) ? P4D_TABLE_UXN : P4D_TABLE_PXN;
	__p4d_populate(p4dp, __pa(pudp), p4dval);
@@ -77,14 +77,16 @@ static inline void
pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp, pte_t *ptep)
{
	VM_BUG_ON(mm && mm != &init_mm);
	__pmd_populate(pmdp, __pa(ptep), PMD_TYPE_TABLE | PMD_TABLE_UXN);
	__pmd_populate(pmdp, __pa(ptep),
		       PMD_TYPE_TABLE | PMD_TABLE_AF | PMD_TABLE_UXN);
}

static inline void
pmd_populate(struct mm_struct *mm, pmd_t *pmdp, pgtable_t ptep)
{
	VM_BUG_ON(mm == &init_mm);
	__pmd_populate(pmdp, page_to_phys(ptep), PMD_TYPE_TABLE | PMD_TABLE_PXN);
	__pmd_populate(pmdp, page_to_phys(ptep),
		       PMD_TYPE_TABLE | PMD_TABLE_AF | PMD_TABLE_PXN);
}

#endif
+3 −0
Original line number Diff line number Diff line
@@ -94,6 +94,7 @@
#define P4D_TYPE_MASK		(_AT(p4dval_t, 3) << 0)
#define P4D_TYPE_SECT		(_AT(p4dval_t, 1) << 0)
#define P4D_SECT_RDONLY		(_AT(p4dval_t, 1) << 7)		/* AP[2] */
#define P4D_TABLE_AF		(_AT(p4dval_t, 1) << 10)	/* Ignored if no FEAT_HAFT */
#define P4D_TABLE_PXN		(_AT(p4dval_t, 1) << 59)
#define P4D_TABLE_UXN		(_AT(p4dval_t, 1) << 60)

@@ -105,6 +106,7 @@
#define PUD_TYPE_MASK		(_AT(pudval_t, 3) << 0)
#define PUD_TYPE_SECT		(_AT(pudval_t, 1) << 0)
#define PUD_SECT_RDONLY		(_AT(pudval_t, 1) << 7)		/* AP[2] */
#define PUD_TABLE_AF		(_AT(pudval_t, 1) << 10)	/* Ignored if no FEAT_HAFT */
#define PUD_TABLE_PXN		(_AT(pudval_t, 1) << 59)
#define PUD_TABLE_UXN		(_AT(pudval_t, 1) << 60)

@@ -115,6 +117,7 @@
#define PMD_TYPE_TABLE		(_AT(pmdval_t, 3) << 0)
#define PMD_TYPE_SECT		(_AT(pmdval_t, 1) << 0)
#define PMD_TABLE_BIT		(_AT(pmdval_t, 1) << 1)
#define PMD_TABLE_AF		(_AT(pmdval_t, 1) << 10)	/* Ignored if no FEAT_HAFT */

/*
 * Section
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