Commit 952ee945 authored by Eric Huang's avatar Eric Huang Committed by Alex Deucher
Browse files

drm/amdgpu: enable trap of each kfd vmid for gfx v9.4.3 



To setup ttmp on as default for gfx v9.4.3 in IP hw init.

Signed-off-by: default avatarEric Huang <jinhuieric.huang@amd.com>
Reviewed-by: default avatarJonathan Kim <jonathan.kim@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent a6c4d01a

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

+6 −0
Original line number Diff line number Diff line
@@ -899,6 +899,7 @@ static void gfx_v9_4_3_xcc_init_compute_vmid(struct amdgpu_device *adev, 
	int i;

	uint32_t sh_mem_config;

	uint32_t sh_mem_bases;

	uint32_t data;



	/*

	 * Configure apertures:
@@ -918,6 +919,11 @@ static void gfx_v9_4_3_xcc_init_compute_vmid(struct amdgpu_device *adev, 
		/* CP and shaders */

		WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regSH_MEM_CONFIG, sh_mem_config);

		WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regSH_MEM_BASES, sh_mem_bases);



		/* Enable trap for each kfd vmid. */

		data = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regSPI_GDBG_PER_VMID_CNTL);

		data = REG_SET_FIELD(data, SPI_GDBG_PER_VMID_CNTL, TRAP_EN, 1);

		WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regSPI_GDBG_PER_VMID_CNTL, data);

	}

	soc15_grbm_select(adev, 0, 0, 0, 0, GET_INST(GC, xcc_id));

	mutex_unlock(&adev->srbm_mutex);