Commit 951b84d4 authored by Amit Cohen's avatar Amit Cohen Committed by David S. Miller
Browse files

mlxsw: reg: Add Monitoring Mirror Trigger Enable Register 



This register is used to configure the mirror enable for different
mirror reasons.

Signed-off-by: default avatarAmit Cohen <amitc@mellanox.com>
Reviewed-by: default avatarJiri Pirko <jiri@mellanox.com>
Reviewed-by: default avatarPetr Machata <petrm@mellanox.com>
Signed-off-by: default avatarPetr Machata <petrm@mellanox.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent c40f4e50

drivers/net/ethernet/mellanox/mlxsw/reg.h

+50 −0
Original line number Diff line number Diff line
@@ -9502,6 +9502,55 @@ MLXSW_ITEM32(reg, mogcr, ptp_iftc, 0x00, 1, 1); 
 */

MLXSW_ITEM32(reg, mogcr, ptp_eftc, 0x00, 0, 1);



/* MOMTE - Monitoring Mirror Trigger Enable Register

 * -------------------------------------------------

 * This register is used to configure the mirror enable for different mirror

 * reasons.

 */

#define MLXSW_REG_MOMTE_ID 0x908D

#define MLXSW_REG_MOMTE_LEN 0x10



MLXSW_REG_DEFINE(momte, MLXSW_REG_MOMTE_ID, MLXSW_REG_MOMTE_LEN);



/* reg_momte_local_port

 * Local port number.

 * Access: Index

 */

MLXSW_ITEM32(reg, momte, local_port, 0x00, 16, 8);



enum mlxsw_reg_momte_type {

	MLXSW_REG_MOMTE_TYPE_WRED = 0x20,

	MLXSW_REG_MOMTE_TYPE_SHARED_BUFFER_TCLASS = 0x31,

	MLXSW_REG_MOMTE_TYPE_SHARED_BUFFER_TCLASS_DESCRIPTORS = 0x32,

	MLXSW_REG_MOMTE_TYPE_SHARED_BUFFER_EGRESS_PORT = 0x33,

	MLXSW_REG_MOMTE_TYPE_ING_CONG = 0x40,

	MLXSW_REG_MOMTE_TYPE_EGR_CONG = 0x50,

	MLXSW_REG_MOMTE_TYPE_ECN = 0x60,

	MLXSW_REG_MOMTE_TYPE_HIGH_LATENCY = 0x70,

};



/* reg_momte_type

 * Type of mirroring.

 * Access: Index

 */

MLXSW_ITEM32(reg, momte, type, 0x04, 0, 8);



/* reg_momte_tclass_en

 * TClass/PG mirror enable. Each bit represents corresponding tclass.

 * 0: disable (default)

 * 1: enable

 * Access: RW

 */

MLXSW_ITEM_BIT_ARRAY(reg, momte, tclass_en, 0x08, 0x08, 1);



static inline void mlxsw_reg_momte_pack(char *payload, u8 local_port,

					enum mlxsw_reg_momte_type type)

{

	MLXSW_REG_ZERO(momte, payload);

	mlxsw_reg_momte_local_port_set(payload, local_port);

	mlxsw_reg_momte_type_set(payload, type);

}



/* MTPPPC - Time Precision Packet Port Configuration

 * -------------------------------------------------

 * This register serves for configuration of which PTP messages should be
@@ -10853,6 +10902,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = { 
	MLXSW_REG(mgpc),

	MLXSW_REG(mprs),

	MLXSW_REG(mogcr),

	MLXSW_REG(momte),

	MLXSW_REG(mtpppc),

	MLXSW_REG(mtpptr),

	MLXSW_REG(mtptpt),