Commit 95086cb9 authored Aug 24, 2022 by Jani Nikula

drm/i915: split gem quirks from display quirks

The lone gem quirk is an outlier, not even handled by the common quirk
code. Split it to a separate gem_quirks member.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/fe9c0cb1e49da0ddc31d24c996af5fd09bce3042.1661346845.git.jani.nikula@intel.com

parent df22d67e

drivers/gpu/drm/i915/gem/i915_gem_pages.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -65,7 +65,7 @@ void __i915_gem_object_set_pages(struct drm_i915_gem_object *obj,
		shrinkable = i915_gem_object_is_shrinkable(obj);

		if (i915_gem_object_is_tiled(obj) &&
		i915->quirks & QUIRK_PIN_SWIZZLED_PAGES) {
		i915->gem_quirks & GEM_QUIRK_PIN_SWIZZLED_PAGES) {
		GEM_BUG_ON(i915_gem_object_has_tiling_quirk(obj));
		i915_gem_object_set_tiling_quirk(obj);
		GEM_BUG_ON(!list_empty(&obj->mm.link));

drivers/gpu/drm/i915/gem/i915_gem_tiling.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -278,7 +278,7 @@ i915_gem_object_set_tiling(struct drm_i915_gem_object *obj,
		*/
		if (i915_gem_object_has_pages(obj) &&
		obj->mm.madv == I915_MADV_WILLNEED &&
		i915->quirks & QUIRK_PIN_SWIZZLED_PAGES) {
		i915->gem_quirks & GEM_QUIRK_PIN_SWIZZLED_PAGES) {
		if (tiling == I915_TILING_NONE) {
		GEM_BUG_ON(!i915_gem_object_has_tiling_quirk(obj));
		i915_gem_object_clear_tiling_quirk(obj);
		@@ -458,7 +458,7 @@ i915_gem_get_tiling_ioctl(struct drm_device dev, void data,
		}

		/* Hide bit 17 from the user -- see comment in i915_gem_set_tiling */
		if (dev_priv->quirks & QUIRK_PIN_SWIZZLED_PAGES)
		if (dev_priv->gem_quirks & GEM_QUIRK_PIN_SWIZZLED_PAGES)
		args->phys_swizzle_mode = I915_BIT_6_SWIZZLE_UNKNOWN;
		else
		args->phys_swizzle_mode = args->swizzle_mode;

drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -711,7 +711,7 @@ static bool bad_swizzling(struct drm_i915_private *i915)
		{
		struct i915_ggtt *ggtt = to_gt(i915)->ggtt;

		if (i915->quirks & QUIRK_PIN_SWIZZLED_PAGES)
		if (i915->gem_quirks & GEM_QUIRK_PIN_SWIZZLED_PAGES)
		return true;

		if (has_bit17_swizzle(ggtt->bit_6_swizzle_x) \|\|

drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -367,7 +367,7 @@ static int igt_partial_tiling(void *arg)
		unsigned int pitch;
		struct tile tile;

		if (i915->quirks & QUIRK_PIN_SWIZZLED_PAGES)
		if (i915->gem_quirks & GEM_QUIRK_PIN_SWIZZLED_PAGES)
		/*
		* The swizzling pattern is actually unknown as it
		* varies based on physical address of each page.
		@@ -464,7 +464,7 @@ static int igt_smoke_tiling(void *arg)
		* Remember to look at the st_seed if we see a flip-flop in BAT!
		*/

		if (i915->quirks & QUIRK_PIN_SWIZZLED_PAGES)
		if (i915->gem_quirks & GEM_QUIRK_PIN_SWIZZLED_PAGES)
		return 0;

		obj = huge_gem_object(i915,

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -727,7 +727,7 @@ static void detect_bit_6_swizzle(struct i915_ggtt *ggtt)
		* bit17 dependent, and so we need to also prevent the pages
		* from being moved.
		*/
		i915->quirks \|= QUIRK_PIN_SWIZZLED_PAGES;
		i915->gem_quirks \|= GEM_QUIRK_PIN_SWIZZLED_PAGES;
		swizzle_x = I915_BIT_6_SWIZZLE_NONE;
		swizzle_y = I915_BIT_6_SWIZZLE_NONE;
		}