Unverified Commit 94f00388 authored by Palmer Dabbelt's avatar Palmer Dabbelt
Browse files

Merge patch series "RISC-V: mm: Make SV48 the default address space" 

Charlie Jenkins <charlie@rivosinc.com> says:

Make sv48 the default address space for mmap as some applications
currently depend on this assumption. Users can now select a
desired address space using a non-zero hint address to mmap. Previously,
requesting the default address space from mmap by passing zero as the hint
address would result in using the largest address space possible. Some
applications depend on empty bits in the virtual address space, like Go and
Java, so this patch provides more flexibility for application developers.

* b4-shazam-merge:
  RISC-V: mm: Document mmap changes
  RISC-V: mm: Update pgtable comment documentation
  RISC-V: mm: Add tests for RISC-V mm
  RISC-V: mm: Restrict address space for sv39,sv48,sv57

Link: https://lore.kernel.org/r/20230809232218.849726-1-charlie@rivosinc.com


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parents 52b77c28 7998abe6

Documentation/riscv/vm-layout.rst

+22 −0
Original line number Diff line number Diff line
@@ -133,3 +133,25 @@ RISC-V Linux Kernel SV57 
   ffffffff00000000 |  -4     GB | ffffffff7fffffff |    2 GB | modules, BPF

   ffffffff80000000 |  -2     GB | ffffffffffffffff |    2 GB | kernel

  __________________|____________|__________________|_________|____________________________________________________________





Userspace VAs

--------------------

To maintain compatibility with software that relies on the VA space with a

maximum of 48 bits the kernel will, by default, return virtual addresses to

userspace from a 48-bit range (sv48). This default behavior is achieved by

passing 0 into the hint address parameter of mmap. On CPUs with an address space

smaller than sv48, the CPU maximum supported address space will be the default.



Software can "opt-in" to receiving VAs from another VA space by providing

a hint address to mmap. A hint address passed to mmap will cause the largest

address space that fits entirely into the hint to be used, unless there is no

space left in the address space. If there is no space available in the requested

address space, an address in the next smallest available address space will be

returned.



For example, in order to obtain 48-bit VA space, a hint address greater than

:code:`1 << 47` must be provided. Note that this is 47 due to sv48 userspace

ending at :code:`1 << 47` and the addresses beyond this are reserved for the

kernel. Similarly, to obtain 57-bit VA space addresses, a hint address greater

than or equal to :code:`1 << 56` must be provided.

arch/riscv/include/asm/elf.h

+1 −1
Original line number Diff line number Diff line
@@ -50,7 +50,7 @@ extern bool compat_elf_check_arch(Elf32_Ehdr *hdr); 
 * the loader.  We need to make sure that it is out of the way of the program

 * that it will "exec", and that there is sufficient room for the brk.

 */

#define ELF_ET_DYN_BASE		((TASK_SIZE / 3) * 2)

#define ELF_ET_DYN_BASE		((DEFAULT_MAP_WINDOW / 3) * 2)



#ifdef CONFIG_64BIT

#ifdef CONFIG_COMPAT

arch/riscv/include/asm/pgtable.h

+28 −5
Original line number Diff line number Diff line
@@ -62,11 +62,16 @@ 
 * struct pages to map half the virtual address space. Then

 * position vmemmap directly below the VMALLOC region.

 */

#define VA_BITS_SV32 32

#ifdef CONFIG_64BIT

#define VA_BITS_SV39 39

#define VA_BITS_SV48 48

#define VA_BITS_SV57 57



#define VA_BITS		(pgtable_l5_enabled ? \

				57 : (pgtable_l4_enabled ? 48 : 39))

				VA_BITS_SV57 : (pgtable_l4_enabled ? VA_BITS_SV48 : VA_BITS_SV39))

#else

#define VA_BITS		32

#define VA_BITS		VA_BITS_SV32

#endif



#define VMEMMAP_SHIFT \
@@ -111,11 +116,27 @@ 
#include <asm/page.h>

#include <asm/tlbflush.h>

#include <linux/mm_types.h>

#include <asm/compat.h>



#define __page_val_to_pfn(_val)  (((_val) & _PAGE_PFN_MASK) >> _PAGE_PFN_SHIFT)



#ifdef CONFIG_64BIT

#include <asm/pgtable-64.h>



#define VA_USER_SV39 (UL(1) << (VA_BITS_SV39 - 1))

#define VA_USER_SV48 (UL(1) << (VA_BITS_SV48 - 1))

#define VA_USER_SV57 (UL(1) << (VA_BITS_SV57 - 1))



#ifdef CONFIG_COMPAT

#define MMAP_VA_BITS_64 ((VA_BITS >= VA_BITS_SV48) ? VA_BITS_SV48 : VA_BITS)

#define MMAP_MIN_VA_BITS_64 (VA_BITS_SV39)

#define MMAP_VA_BITS (is_compat_task() ? VA_BITS_SV32 : MMAP_VA_BITS_64)

#define MMAP_MIN_VA_BITS (is_compat_task() ? VA_BITS_SV32 : MMAP_MIN_VA_BITS_64)

#else

#define MMAP_VA_BITS ((VA_BITS >= VA_BITS_SV48) ? VA_BITS_SV48 : VA_BITS)

#define MMAP_MIN_VA_BITS (VA_BITS_SV39)

#endif /* CONFIG_COMPAT */



#else

#include <asm/pgtable-32.h>

#endif /* CONFIG_64BIT */
@@ -833,11 +854,13 @@ static inline pte_t pte_swp_clear_exclusive(pte_t pte) 
 * -        0x9fc00000	(~2.5GB) for RV32.

 * -      0x4000000000	( 256GB) for RV64 using SV39 mmu

 * -    0x800000000000	( 128TB) for RV64 using SV48 mmu

 * - 0x100000000000000	(  64PB) for RV64 using SV57 mmu

 *

 * Note that PGDIR_SIZE must evenly divide TASK_SIZE since "RISC-V

 * Instruction Set Manual Volume II: Privileged Architecture" states that

 * "load and store effective addresses, which are 64bits, must have bits

 * 63–48 all equal to bit 47, or else a page-fault exception will occur."

 * Similarly for SV57, bits 63–57 must be equal to bit 56.

 */

#ifdef CONFIG_64BIT

#define TASK_SIZE_64	(PGDIR_SIZE * PTRS_PER_PGD / 2)

arch/riscv/include/asm/processor.h

+46 −6
Original line number Diff line number Diff line
@@ -13,19 +13,59 @@ 


#include <asm/ptrace.h>



#ifdef CONFIG_64BIT

#define DEFAULT_MAP_WINDOW	(UL(1) << (MMAP_VA_BITS - 1))

#define STACK_TOP_MAX		TASK_SIZE_64



#define arch_get_mmap_end(addr, len, flags)			\

({								\

	unsigned long mmap_end;					\

	typeof(addr) _addr = (addr);				\

	if ((_addr) == 0 || (IS_ENABLED(CONFIG_COMPAT) && is_compat_task())) \

		mmap_end = STACK_TOP_MAX;			\

	else if ((_addr) >= VA_USER_SV57)			\

		mmap_end = STACK_TOP_MAX;			\

	else if ((((_addr) >= VA_USER_SV48)) && (VA_BITS >= VA_BITS_SV48)) \

		mmap_end = VA_USER_SV48;			\

	else							\

		mmap_end = VA_USER_SV39;			\

	mmap_end;						\

})



#define arch_get_mmap_base(addr, base)				\

({								\

	unsigned long mmap_base;				\

	typeof(addr) _addr = (addr);				\

	typeof(base) _base = (base);				\

	unsigned long rnd_gap = DEFAULT_MAP_WINDOW - (_base);	\

	if ((_addr) == 0 || (IS_ENABLED(CONFIG_COMPAT) && is_compat_task())) \

		mmap_base = (_base);				\

	else if (((_addr) >= VA_USER_SV57) && (VA_BITS >= VA_BITS_SV57)) \

		mmap_base = VA_USER_SV57 - rnd_gap;		\

	else if ((((_addr) >= VA_USER_SV48)) && (VA_BITS >= VA_BITS_SV48)) \

		mmap_base = VA_USER_SV48 - rnd_gap;		\

	else							\

		mmap_base = VA_USER_SV39 - rnd_gap;		\

	mmap_base;						\

})



#else

#define DEFAULT_MAP_WINDOW	TASK_SIZE

#define STACK_TOP_MAX		TASK_SIZE

#endif

#define STACK_ALIGN		16



#define STACK_TOP		DEFAULT_MAP_WINDOW



/*

 * This decides where the kernel will search for a free chunk of vm

 * space during mmap's.

 */

#define TASK_UNMAPPED_BASE	PAGE_ALIGN(TASK_SIZE / 3)



#define STACK_TOP		TASK_SIZE

#ifdef CONFIG_64BIT

#define STACK_TOP_MAX		TASK_SIZE_64

#define TASK_UNMAPPED_BASE	PAGE_ALIGN((UL(1) << MMAP_MIN_VA_BITS) / 3)

#else

#define STACK_TOP_MAX		TASK_SIZE

#define TASK_UNMAPPED_BASE	PAGE_ALIGN(TASK_SIZE / 3)

#endif

#define STACK_ALIGN		16



#ifndef __ASSEMBLY__

tools/testing/selftests/riscv/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -5,7 +5,7 @@ 
ARCH ?= $(shell uname -m 2>/dev/null || echo not)



ifneq (,$(filter $(ARCH),riscv))

RISCV_SUBTARGETS ?= hwprobe vector

RISCV_SUBTARGETS ?= hwprobe vector mm

else

RISCV_SUBTARGETS :=

endif