Commit 9485a04a authored by Yong Wu's avatar Yong Wu Committed by Joerg Roedel
Browse files

iommu/mediatek: Separate mtk_iommu_data for v1 and v2 



Prepare for adding the structure "mtk_iommu_bank_data". No functional
change. The mtk_iommu_domain in v1 and v2 are different, we could not add
current data as bank[0] in v1 simplistically.

Currently we have no plan to add new SoC for v1, in order to avoid affect
v1 when we add many new features for v2, I totally separate v1 and v2 in
this patch, there are many structures only for v2.

Signed-off-by: default avatarYong Wu <yong.wu@mediatek.com>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
Link: https://lore.kernel.org/r/20220503071427.2285-27-yong.wu@mediatek.com


Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
parent 634f57df

drivers/iommu/mtk_iommu.c

+77 −5
Original line number Diff line number Diff line
@@ -146,6 +146,69 @@ 


#define MTK_INVALID_LARBID		MTK_LARB_NR_MAX



#define MTK_LARB_COM_MAX	8

#define MTK_LARB_SUBCOM_MAX	8



#define MTK_IOMMU_GROUP_MAX	8



enum mtk_iommu_plat {

	M4U_MT2712,

	M4U_MT6779,

	M4U_MT8167,

	M4U_MT8173,

	M4U_MT8183,

	M4U_MT8192,

	M4U_MT8195,

};



struct mtk_iommu_iova_region {

	dma_addr_t		iova_base;

	unsigned long long	size;

};



struct mtk_iommu_plat_data {

	enum mtk_iommu_plat	m4u_plat;

	u32			flags;

	u32			inv_sel_reg;



	char			*pericfg_comp_str;

	struct list_head	*hw_list;

	unsigned int		iova_region_nr;

	const struct mtk_iommu_iova_region	*iova_region;

	unsigned char       larbid_remap[MTK_LARB_COM_MAX][MTK_LARB_SUBCOM_MAX];

};



struct mtk_iommu_data {

	void __iomem			*base;

	int				irq;

	struct device			*dev;

	struct clk			*bclk;

	phys_addr_t			protect_base; /* protect memory base */

	struct mtk_iommu_suspend_reg	reg;

	struct mtk_iommu_domain		*m4u_dom;

	struct iommu_group		*m4u_group[MTK_IOMMU_GROUP_MAX];

	bool                            enable_4GB;

	spinlock_t			tlb_lock; /* lock for tlb range flush */



	struct iommu_device		iommu;

	const struct mtk_iommu_plat_data *plat_data;

	struct device			*smicomm_dev;



	struct dma_iommu_mapping	*mapping; /* For mtk_iommu_v1.c */

	struct regmap			*pericfg;



	struct mutex			mutex; /* Protect m4u_group/m4u_dom above */



	/*

	 * In the sharing pgtable case, list data->list to the global list like m4ulist.

	 * In the non-sharing pgtable case, list data->list to the itself hw_list_head.

	 */

	struct list_head		*hw_list;

	struct list_head		hw_list_head;

	struct list_head		list;

	struct mtk_smi_larb_iommu	larb_imu[MTK_LARB_NR_MAX];

};



struct mtk_iommu_domain {

	struct io_pgtable_cfg		cfg;

	struct io_pgtable_ops		*iop;
@@ -156,6 +219,20 @@ struct mtk_iommu_domain { 
	struct mutex			mutex; /* Protect "data" in this structure */

};



static int mtk_iommu_bind(struct device *dev)

{

	struct mtk_iommu_data *data = dev_get_drvdata(dev);



	return component_bind_all(dev, &data->larb_imu);

}



static void mtk_iommu_unbind(struct device *dev)

{

	struct mtk_iommu_data *data = dev_get_drvdata(dev);



	component_unbind_all(dev, &data->larb_imu);

}



static const struct iommu_ops mtk_iommu_ops;



static int mtk_iommu_hw_init(const struct mtk_iommu_data *data);
@@ -193,11 +270,6 @@ static LIST_HEAD(m4ulist); /* List all the M4U HWs */ 


#define for_each_m4u(data, head)  list_for_each_entry(data, head, list)



struct mtk_iommu_iova_region {

	dma_addr_t		iova_base;

	unsigned long long	size;

};



static const struct mtk_iommu_iova_region single_domain[] = {

	{.iova_base = 0,		.size = SZ_4G},

};

drivers/iommu/mtk_iommu.h

+0 −81
Original line number Diff line number Diff line
@@ -7,23 +7,14 @@ 
#ifndef _MTK_IOMMU_H_

#define _MTK_IOMMU_H_



#include <linux/clk.h>

#include <linux/component.h>

#include <linux/device.h>

#include <linux/io.h>

#include <linux/io-pgtable.h>

#include <linux/iommu.h>

#include <linux/list.h>

#include <linux/spinlock.h>

#include <linux/dma-mapping.h>

#include <soc/mediatek/smi.h>

#include <dt-bindings/memory/mtk-memory-port.h>



#define MTK_LARB_COM_MAX	8

#define MTK_LARB_SUBCOM_MAX	8



#define MTK_IOMMU_GROUP_MAX	8



struct mtk_iommu_suspend_reg {

	union {

		u32			standard_axi_mode;/* v1 */
@@ -38,76 +29,4 @@ struct mtk_iommu_suspend_reg { 
	u32				wr_len_ctrl;

};



enum mtk_iommu_plat {

	M4U_MT2701,

	M4U_MT2712,

	M4U_MT6779,

	M4U_MT8167,

	M4U_MT8173,

	M4U_MT8183,

	M4U_MT8192,

	M4U_MT8195,

};



struct mtk_iommu_iova_region;



struct mtk_iommu_plat_data {

	enum mtk_iommu_plat m4u_plat;

	u32                 flags;

	u32                 inv_sel_reg;



	char					*pericfg_comp_str;

	struct list_head			*hw_list;

	unsigned int				iova_region_nr;

	const struct mtk_iommu_iova_region	*iova_region;

	unsigned char       larbid_remap[MTK_LARB_COM_MAX][MTK_LARB_SUBCOM_MAX];

};



struct mtk_iommu_domain;



struct mtk_iommu_data {

	void __iomem			*base;

	int				irq;

	struct device			*dev;

	struct clk			*bclk;

	phys_addr_t			protect_base; /* protect memory base */

	struct mtk_iommu_suspend_reg	reg;

	struct mtk_iommu_domain		*m4u_dom;

	struct iommu_group		*m4u_group[MTK_IOMMU_GROUP_MAX];

	bool                            enable_4GB;

	spinlock_t			tlb_lock; /* lock for tlb range flush */



	struct iommu_device		iommu;

	const struct mtk_iommu_plat_data *plat_data;

	struct device			*smicomm_dev;



	struct dma_iommu_mapping	*mapping; /* For mtk_iommu_v1.c */

	struct regmap			*pericfg;



	struct mutex			mutex; /* Protect m4u_group/m4u_dom above */



	/*

	 * In the sharing pgtable case, list data->list to the global list like m4ulist.

	 * In the non-sharing pgtable case, list data->list to the itself hw_list_head.

	 */

	struct list_head		*hw_list;

	struct list_head		hw_list_head;

	struct list_head		list;

	struct mtk_smi_larb_iommu	larb_imu[MTK_LARB_NR_MAX];

};



static inline int mtk_iommu_bind(struct device *dev)

{

	struct mtk_iommu_data *data = dev_get_drvdata(dev);



	return component_bind_all(dev, &data->larb_imu);

}



static inline void mtk_iommu_unbind(struct device *dev)

{

	struct mtk_iommu_data *data = dev_get_drvdata(dev);



	component_unbind_all(dev, &data->larb_imu);

}



#endif

drivers/iommu/mtk_iommu_v1.c

+29 −0
Original line number Diff line number Diff line
@@ -87,6 +87,21 @@ 
 */

#define M2701_IOMMU_PGT_SIZE			SZ_4M



struct mtk_iommu_data {

	void __iomem			*base;

	int				irq;

	struct device			*dev;

	struct clk			*bclk;

	phys_addr_t			protect_base; /* protect memory base */

	struct mtk_iommu_domain		*m4u_dom;



	struct iommu_device		iommu;

	struct dma_iommu_mapping	*mapping;

	struct mtk_smi_larb_iommu	larb_imu[MTK_LARB_NR_MAX];



	struct mtk_iommu_suspend_reg	reg;

};



struct mtk_iommu_domain {

	spinlock_t			pgtlock; /* lock for page table */

	struct iommu_domain		domain;
@@ -95,6 +110,20 @@ struct mtk_iommu_domain { 
	struct mtk_iommu_data		*data;

};



static int mtk_iommu_bind(struct device *dev)

{

	struct mtk_iommu_data *data = dev_get_drvdata(dev);



	return component_bind_all(dev, &data->larb_imu);

}



static void mtk_iommu_unbind(struct device *dev)

{

	struct mtk_iommu_data *data = dev_get_drvdata(dev);



	component_unbind_all(dev, &data->larb_imu);

}



static struct mtk_iommu_domain *to_mtk_domain(struct iommu_domain *dom)

{

	return container_of(dom, struct mtk_iommu_domain, domain);