Commit 9475a943 authored by Shaoyun Liu's avatar Shaoyun Liu Committed by Alex Deucher
Browse files

drm/amdgpu: Add place holder for soc15 asic init on emulation 



Add common smu_soc_asic_init function to emulate the sillicon post sequence

Signed-off-by: default avatarShaoyun Liu <Shaoyun.Liu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 593aa2d2

drivers/gpu/drm/amd/amdgpu/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -63,7 +63,7 @@ amdgpu-$(CONFIG_DRM_AMDGPU_CIK)+= cik.o cik_ih.o kv_smc.o kv_dpm.o \ 
amdgpu-$(CONFIG_DRM_AMDGPU_SI)+= si.o gmc_v6_0.o gfx_v6_0.o si_ih.o si_dma.o dce_v6_0.o si_dpm.o si_smc.o



amdgpu-y += \

	vi.o mxgpu_vi.o nbio_v6_1.o soc15.o mxgpu_ai.o nbio_v7_0.o vega10_reg_init.o

	vi.o mxgpu_vi.o nbio_v6_1.o soc15.o emu_soc.o mxgpu_ai.o nbio_v7_0.o vega10_reg_init.o



# add GMC block

amdgpu-y += \

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+2 −0
Original line number Diff line number Diff line
@@ -1657,6 +1657,8 @@ void amdgpu_mm_wdoorbell64(struct amdgpu_device *adev, u32 index, u64 v); 
bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type);

bool amdgpu_device_has_dc_support(struct amdgpu_device *adev);



int emu_soc_asic_init(struct amdgpu_device *adev);



/*

 * Registers read & write functions.

 */

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+4 −14
Original line number Diff line number Diff line
@@ -1311,19 +1311,6 @@ static int amdgpu_device_ip_init(struct amdgpu_device *adev) 
		}

		adev->ip_blocks[i].status.sw = true;



		if (amdgpu_emu_mode == 1) {

			/* Need to do common hw init first on emulation  */

			if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_COMMON) {

				r = adev->ip_blocks[i].version->funcs->hw_init((void *)adev);

				if (r) {

					DRM_ERROR("hw_init of IP block <%s> failed %d\n",

						adev->ip_blocks[i].version->funcs->name, r);

					return r;

				}

				adev->ip_blocks[i].status.hw = true;

			}

		}



		/* need to do gmc hw init early so we can allocate gpu mem */

		if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GMC) {

			r = amdgpu_device_vram_scratch_init(adev);
@@ -1902,8 +1889,11 @@ int amdgpu_device_init(struct amdgpu_device *adev, 
	if (runtime)

		vga_switcheroo_init_domain_pm_ops(adev->dev, &adev->vga_pm_domain);



	if (amdgpu_emu_mode == 1)

	if (amdgpu_emu_mode == 1) {

		/* post the asic on emulation mode */

		emu_soc_asic_init(adev);

		goto fence_driver_init;

	}



	/* Read BIOS */

	if (!amdgpu_get_bios(adev)) {

drivers/gpu/drm/amd/amdgpu/emu_soc.c

0 → 100644
+33 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2018 Advanced Micro Devices, Inc.

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR

 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 * OTHER DEALINGS IN THE SOFTWARE.

 *

 */

#include "amdgpu.h"

#include "soc15.h"



#include "soc15_common.h"

#include "soc15_hw_ip.h"



int emu_soc_asic_init(struct amdgpu_device *adev)

{

	return 0;

}