Commit 94557a9a authored by Vladimir Oltean's avatar Vladimir Oltean Committed by David S. Miller
Browse files

net: enetc: detect frame preemption hardware capability



Similar to other TSN features, query the Station Interface capability
register to see whether preemption is supported on this port or not.
On LS1028A, preemption is available on ports 0 and 2, but not on 1
and 3.

This will allow us in the future to write the pMAC registers only on the
ENETC ports where a pMAC actually exists.

Signed-off-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent e3972399
Loading
Loading
Loading
Loading
+3 −0
Original line number Diff line number Diff line
@@ -1713,6 +1713,9 @@ void enetc_get_si_caps(struct enetc_si *si)
	if (val & ENETC_SIPCAPR0_QBV)
		si->hw_features |= ENETC_SI_F_QBV;

	if (val & ENETC_SIPCAPR0_QBU)
		si->hw_features |= ENETC_SI_F_QBU;

	if (val & ENETC_SIPCAPR0_PSFP)
		si->hw_features |= ENETC_SI_F_PSFP;
}
+3 −2
Original line number Diff line number Diff line
@@ -229,8 +229,9 @@ enum enetc_errata {
	ENETC_ERR_UCMCSWP	= BIT(1),
};

#define ENETC_SI_F_QBV BIT(0)
#define ENETC_SI_F_PSFP BIT(1)
#define ENETC_SI_F_PSFP BIT(0)
#define ENETC_SI_F_QBV  BIT(1)
#define ENETC_SI_F_QBU  BIT(2)

/* PCI IEP device data */
struct enetc_si {
+2 −1
Original line number Diff line number Diff line
@@ -18,9 +18,10 @@
#define ENETC_SICTR0	0x18
#define ENETC_SICTR1	0x1c
#define ENETC_SIPCAPR0	0x20
#define ENETC_SIPCAPR0_QBV	BIT(4)
#define ENETC_SIPCAPR0_PSFP	BIT(9)
#define ENETC_SIPCAPR0_RSS	BIT(8)
#define ENETC_SIPCAPR0_QBV	BIT(4)
#define ENETC_SIPCAPR0_QBU	BIT(3)
#define ENETC_SIPCAPR1	0x24
#define ENETC_SITGTGR	0x30
#define ENETC_SIRBGCR	0x38