Commit 944bda74 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915/vrr: Fix guardband/vblank exit length calculation for adl+ 



We are miscalculating both the guardband value, and the resulting
vblank exit length on adl+. This means that our start of vblank
(double buffered register latch point) is incorrect, and we also
think that it's not where it actually is (hence vblank evasion/etc.
may not work properly). Fix up the calculations to match the real
hardware behaviour (as reverse engineered by intel_display_poller).

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221202134412.21943-3-ville.syrjala@linux.intel.com


Reviewed-by: default avatarManasi Navare <manasi.d.navare@intel.com>
parent 98f974aa

drivers/gpu/drm/i915/display/intel_vrr.c

+3 −3
Original line number Diff line number Diff line
@@ -78,10 +78,10 @@ static int intel_vrr_vblank_exit_length(const struct intel_crtc_state *crtc_stat 
	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

	struct drm_i915_private *i915 = to_i915(crtc->base.dev);



	/* The hw imposes the extra scanline before frame start */

	if (DISPLAY_VER(i915) >= 13)

		return crtc_state->vrr.guardband + crtc_state->framestart_delay + 1;

		return crtc_state->vrr.guardband;

	else

		/* The hw imposes the extra scanline before frame start */

		return crtc_state->vrr.pipeline_full + crtc_state->framestart_delay + 1;

}
@@ -151,7 +151,7 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state, 
		 * number of scan lines. Assuming 0 for no DSB.

		 */

		crtc_state->vrr.guardband =

			crtc_state->vrr.vmin - adjusted_mode->crtc_vdisplay;

			crtc_state->vrr.vmin + 1 - adjusted_mode->crtc_vdisplay;

	} else {

		crtc_state->vrr.pipeline_full =

			min(255, crtc_state->vrr.vmin - adjusted_mode->crtc_vdisplay -