Commit 941edc2e authored by Thomas Gleixner's avatar Thomas Gleixner Committed by PvsNarasimha
Browse files

x86/msi: Provide msi message shadow structs 

mainline inclusion
from mainline-v5.11-rc1
commit 6285aa50
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/IAU6ZD

Reference: https://github.com/torvalds/linux/commit/6285aa507366729c618d5295fb540b24a956088a



--------------------------------

commit 6285aa50 upstream

Create shadow structs with named bitfields for msi_msg data, address_lo and
address_hi and use them in the MSI message composer.

Provide a function to retrieve the destination ID. This could be inline,
but that'd create a circular header dependency.

[dwmw2: fix bitfields not all to be a union]

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarDavid Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20201024213535.443185-13-dwmw2@infradead.org


Signed-off-by: default avatarPvsNarasimha <PVS.NarasimhaRao@amd.com>
parent 4cd15b73

arch/x86/include/asm/msi.h

+49 −0
Original line number Diff line number Diff line
@@ -9,4 +9,53 @@ typedef struct irq_alloc_info msi_alloc_info_t; 
int pci_msi_prepare(struct irq_domain *domain, struct device *dev, int nvec,

		    msi_alloc_info_t *arg);



/* Structs and defines for the X86 specific MSI message format */



typedef struct x86_msi_data {

	u32	vector			:  8,

		delivery_mode		:  3,

		dest_mode_logical	:  1,

		reserved		:  2,

		active_low		:  1,

		is_level		:  1;



	u32	dmar_subhandle;

} __attribute__ ((packed)) arch_msi_msg_data_t;

#define arch_msi_msg_data	x86_msi_data



typedef struct x86_msi_addr_lo {

	union {

		struct {

			u32	reserved_0		:  2,

				dest_mode_logical	:  1,

				redirect_hint		:  1,

				reserved_1		:  8,

				destid_0_7		:  8,

				base_address		: 12;

		};

		struct {

			u32	dmar_reserved_0		:  2,

				dmar_index_15		:  1,

				dmar_subhandle_valid	:  1,

				dmar_format		:  1,

				dmar_index_0_14		: 15,

				dmar_base_address	: 12;

		};

	};

} __attribute__ ((packed)) arch_msi_msg_addr_lo_t;

#define arch_msi_msg_addr_lo	x86_msi_addr_lo



#define X86_MSI_BASE_ADDRESS_LOW	(0xfee00000 >> 20)



typedef struct x86_msi_addr_hi {

	u32	reserved		:  8,

		destid_8_31		: 24;

} __attribute__ ((packed)) arch_msi_msg_addr_hi_t;

#define arch_msi_msg_addr_hi	x86_msi_addr_hi



#define X86_MSI_BASE_ADDRESS_HIGH	(0)



struct msi_msg;

u32 x86_msi_msg_get_destid(struct msi_msg *msg, bool extid);



#endif /* _ASM_X86_MSI_H */

arch/x86/kernel/apic/apic.c

+19 −16
Original line number Diff line number Diff line
@@ -51,7 +51,6 @@ 
#include <asm/io_apic.h>

#include <asm/desc.h>

#include <asm/hpet.h>

#include <asm/msidef.h>

#include <asm/mtrr.h>

#include <asm/time.h>

#include <asm/smp.h>
@@ -2492,22 +2491,16 @@ int hard_smp_processor_id(void) 
void __irq_msi_compose_msg(struct irq_cfg *cfg, struct msi_msg *msg,

			   bool dmar)

{

	msg->address_hi = MSI_ADDR_BASE_HI;

	memset(msg, 0, sizeof(*msg));



	msg->address_lo =

		MSI_ADDR_BASE_LO |

		(apic->dest_mode_logical ?

			MSI_ADDR_DEST_MODE_LOGICAL :

			MSI_ADDR_DEST_MODE_PHYSICAL) |

		MSI_ADDR_REDIRECTION_CPU |

		MSI_ADDR_DEST_ID(cfg->dest_apicid);

	msg->arch_addr_lo.base_address = X86_MSI_BASE_ADDRESS_LOW;

	msg->arch_addr_lo.dest_mode_logical = apic->dest_mode_logical;

	msg->arch_addr_lo.destid_0_7 = cfg->dest_apicid & 0xFF;



	msg->data =

		MSI_DATA_TRIGGER_EDGE |

		MSI_DATA_LEVEL_ASSERT |

		MSI_DATA_DELIVERY_FIXED |

		MSI_DATA_VECTOR(cfg->vector);

	msg->arch_data.delivery_mode = APIC_DELIVERY_MODE_FIXED;

	msg->arch_data.vector = cfg->vector;



	msg->address_hi = X86_MSI_BASE_ADDRESS_HIGH;

	/*

	 * Only the IOMMU itself can use the trick of putting destination

	 * APIC ID into the high bits of the address. Anything else would
@@ -2515,11 +2508,21 @@ void __irq_msi_compose_msg(struct irq_cfg *cfg, struct msi_msg *msg, 
	 * address higher APIC IDs.

	 */

	if (dmar)

		msg->address_hi |= MSI_ADDR_EXT_DEST_ID(cfg->dest_apicid);

		msg->arch_addr_hi.destid_8_31 = cfg->dest_apicid >> 8;

	else

		WARN_ON_ONCE(MSI_ADDR_EXT_DEST_ID(cfg->dest_apicid));

		WARN_ON_ONCE(cfg->dest_apicid > 0xFF);

}



u32 x86_msi_msg_get_destid(struct msi_msg *msg, bool extid)

{

	u32 dest = msg->arch_addr_lo.destid_0_7;



	if (extid)

		dest |= msg->arch_addr_hi.destid_8_31 << 8;

	return dest;

}

EXPORT_SYMBOL_GPL(x86_msi_msg_get_destid);



/*

 * Override the generic EOI implementation with an optimized version.

 * Only called during early boot when only one CPU is active and with