Commit 9407feac authored by Tim Huang's avatar Tim Huang Committed by Alex Deucher
Browse files

drm/amdgpu: enable NBIO IP v7.7.0 Clock Gating 



Enable AMD_CG_SUPPORT_BIF_MGCG and AMD_CG_SUPPORT_BIF_LS support.

Signed-off-by: default avatarTim Huang <tim.huang@amd.com>
Reviewed-by: default avatarYifan Zhang <yifan1.zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c4d0d699

drivers/gpu/drm/amd/amdgpu/soc21.c

+3 −4
Original line number Diff line number Diff line
@@ -603,6 +603,8 @@ static int soc21_common_early_init(void *handle) 
			AMD_CG_SUPPORT_ATHUB_MGCG |

			AMD_CG_SUPPORT_ATHUB_LS |

			AMD_CG_SUPPORT_IH_CG |

			AMD_CG_SUPPORT_BIF_MGCG |

			AMD_CG_SUPPORT_BIF_LS |

			AMD_CG_SUPPORT_VCN_MGCG |

			AMD_CG_SUPPORT_JPEG_MGCG;

		adev->pg_flags =
@@ -702,6 +704,7 @@ static int soc21_common_set_clockgating_state(void *handle, 
	switch (adev->ip_versions[NBIO_HWIP][0]) {

	case IP_VERSION(4, 3, 0):

	case IP_VERSION(4, 3, 1):

	case IP_VERSION(7, 7, 0):

		adev->nbio.funcs->update_medium_grain_clock_gating(adev,

				state == AMD_CG_STATE_GATE);

		adev->nbio.funcs->update_medium_grain_light_sleep(adev,
@@ -709,10 +712,6 @@ static int soc21_common_set_clockgating_state(void *handle, 
		adev->hdp.funcs->update_clock_gating(adev,

				state == AMD_CG_STATE_GATE);

		break;

	case IP_VERSION(7, 7, 0):

		adev->hdp.funcs->update_clock_gating(adev,

				state == AMD_CG_STATE_GATE);

		break;

	default:

		break;

	}