Commit 9401f4e4 authored by Christophe Leroy's avatar Christophe Leroy Committed by Michael Ellerman
Browse files

powerpc: Use lwarx/ldarx directly instead of PPC_LWARX/LDARX macros 



Force the eh flag at 0 on PPC32.

Signed-off-by: default avatarChristophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/1fc81f07cabebb875b963e295408cc3dd38c8d85.1614674882.git.christophe.leroy@csgroup.eu
parent 19e932eb

arch/powerpc/include/asm/asm-compat.h

+2 −2
Original line number Diff line number Diff line
@@ -17,7 +17,7 @@ 
#define PPC_LONG	stringify_in_c(.8byte)

#define PPC_LONG_ALIGN	stringify_in_c(.balign 8)

#define PPC_TLNEI	stringify_in_c(tdnei)

#define PPC_LLARX(t, a, b, eh)	PPC_LDARX(t, a, b, eh)

#define PPC_LLARX	stringify_in_c(ldarx)

#define PPC_STLCX	stringify_in_c(stdcx.)

#define PPC_CNTLZL	stringify_in_c(cntlzd)

#define PPC_MTOCRF(FXM, RS) MTOCRF((FXM), RS)
@@ -50,7 +50,7 @@ 
#define PPC_LONG	stringify_in_c(.long)

#define PPC_LONG_ALIGN	stringify_in_c(.balign 4)

#define PPC_TLNEI	stringify_in_c(twnei)

#define PPC_LLARX(t, a, b, eh)	PPC_LWARX(t, a, b, eh)

#define PPC_LLARX	stringify_in_c(lwarx)

#define PPC_STLCX	stringify_in_c(stwcx.)

#define PPC_CNTLZL	stringify_in_c(cntlzw)

#define PPC_MTOCRF	stringify_in_c(mtcrf)

arch/powerpc/include/asm/atomic.h

+2 −2
Original line number Diff line number Diff line
@@ -207,7 +207,7 @@ arch_atomic_try_cmpxchg_lock(atomic_t *v, int *old, int new) 
	int r, o = *old;



	__asm__ __volatile__ (

"1:\t"	PPC_LWARX(%0,0,%2,1) "	# atomic_try_cmpxchg_acquire	\n"

"1:	lwarx	%0,0,%2,%5	# atomic_try_cmpxchg_acquire		\n"

"	cmpw	0,%0,%3							\n"

"	bne-	2f							\n"

"	stwcx.	%4,0,%2							\n"
@@ -215,7 +215,7 @@ arch_atomic_try_cmpxchg_lock(atomic_t *v, int *old, int new) 
"\t"	PPC_ACQUIRE_BARRIER "						\n"

"2:									\n"

	: "=&r" (r), "+m" (v->counter)

	: "r" (&v->counter), "r" (o), "r" (new)

	: "r" (&v->counter), "r" (o), "r" (new), "i" (IS_ENABLED(CONFIG_PPC64) ? 1 : 0)

	: "cr0", "memory");



	if (unlikely(r != o))

arch/powerpc/include/asm/bitops.h

+4 −4
Original line number Diff line number Diff line
@@ -70,7 +70,7 @@ static inline void fn(unsigned long mask, \ 
	unsigned long *p = (unsigned long *)_p;	\

	__asm__ __volatile__ (			\

	prefix					\

"1:"	PPC_LLARX(%0,0,%3,0) "\n"		\

"1:"	PPC_LLARX "%0,0,%3,0\n"			\

	stringify_in_c(op) "%0,%0,%2\n"		\

	PPC_STLCX "%0,0,%3\n"			\

	"bne- 1b\n"				\
@@ -115,13 +115,13 @@ static inline unsigned long fn( \ 
	unsigned long *p = (unsigned long *)_p;		\

	__asm__ __volatile__ (				\

	prefix						\

"1:"	PPC_LLARX(%0,0,%3,eh) "\n"			\

"1:"	PPC_LLARX "%0,0,%3,%4\n"			\

	stringify_in_c(op) "%1,%0,%2\n"			\

	PPC_STLCX "%1,0,%3\n"				\

	"bne- 1b\n"					\

	postfix						\

	: "=&r" (old), "=&r" (t)			\

	: "r" (mask), "r" (p)				\

	: "r" (mask), "r" (p), "i" (IS_ENABLED(CONFIG_PPC64) ? eh : 0)	\

	: "cc", "memory");				\

	return (old & mask);				\

}
@@ -170,7 +170,7 @@ clear_bit_unlock_return_word(int nr, volatile unsigned long *addr) 


	__asm__ __volatile__ (

	PPC_RELEASE_BARRIER

"1:"	PPC_LLARX(%0,0,%3,0) "\n"

"1:"	PPC_LLARX "%0,0,%3,0\n"

	"andc %1,%0,%2\n"

	PPC_STLCX "%1,0,%3\n"

	"bne- 1b\n"

arch/powerpc/include/asm/ppc-opcode.h

+0 −2
Original line number Diff line number Diff line
@@ -576,8 +576,6 @@ 
#define	PPC_DIVDE(t, a, b)	stringify_in_c(.long PPC_RAW_DIVDE(t, a, b))

#define	PPC_DIVDEU(t, a, b)	stringify_in_c(.long PPC_RAW_DIVDEU(t, a, b))

#define PPC_LQARX(t, a, b, eh)	stringify_in_c(.long PPC_RAW_LQARX(t, a, b, eh))

#define PPC_LDARX(t, a, b, eh)	stringify_in_c(.long PPC_RAW_LDARX(t, a, b, eh))

#define PPC_LWARX(t, a, b, eh)	stringify_in_c(.long PPC_RAW_LWARX(t, a, b, eh))

#define PPC_STQCX(t, a, b)	stringify_in_c(.long PPC_RAW_STQCX(t, a, b))

#define PPC_MADDHD(t, a, b, c)	stringify_in_c(.long PPC_RAW_MADDHD(t, a, b, c))

#define PPC_MADDHDU(t, a, b, c)	stringify_in_c(.long PPC_RAW_MADDHDU(t, a, b, c))

arch/powerpc/include/asm/simple_spinlock.h

+3 −3
Original line number Diff line number Diff line
@@ -51,7 +51,7 @@ static inline unsigned long __arch_spin_trylock(arch_spinlock_t *lock) 


	token = LOCK_TOKEN;

	__asm__ __volatile__(

"1:	" PPC_LWARX(%0,0,%2,1) "\n\

"1:	lwarx		%0,0,%2,1\n\

	cmpwi		0,%0,0\n\

	bne-		2f\n\

	stwcx.		%1,0,%2\n\
@@ -179,7 +179,7 @@ static inline long __arch_read_trylock(arch_rwlock_t *rw) 
	long tmp;



	__asm__ __volatile__(

"1:	" PPC_LWARX(%0,0,%1,1) "\n"

"1:	lwarx		%0,0,%1,1\n"

	__DO_SIGN_EXTEND

"	addic.		%0,%0,1\n\

	ble-		2f\n"
@@ -203,7 +203,7 @@ static inline long __arch_write_trylock(arch_rwlock_t *rw) 


	token = WRLOCK_TOKEN;

	__asm__ __volatile__(

"1:	" PPC_LWARX(%0,0,%2,1) "\n\

"1:	lwarx		%0,0,%2,1\n\

	cmpwi		0,%0,0\n\

	bne-		2f\n"

"	stwcx.		%1,0,%2\n\