Commit 93e2b017 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'pinctrl-v6.3-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl 

Pull pin control fixes from Linus Walleij:
 "Some pin control fixes for the v6.3 series.

  The most notable and urgent one is probably the AMD fix which affects
  AMD laptops, found by the Chromium people.

  Summary:

   - Fix up the Kconfig options for MediaTek MT7981

   - Fix the irq domain name in the AT91-PIO4 driver

   - Fix some alternative muxing modes in the Ocelot driver

   - Allocate the GPIO numbers dynamically in the STM32 driver

   - Disable and mask interrupts on resume in the AMD driver

   - Fix a typo in the Qualcomm SM8550 pin control device tree bindings"

* tag 'pinctrl-v6.3-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  dt-bindings: pinctrl: qcom,sm8550-lpass-lpi: allow input-enabled and bias-bus-hold
  pinctrl: amd: Disable and mask interrupts on resume
  pinctrl: stm32: use dynamic allocation of GPIO base
  pinctrl: ocelot: Fix alt mode for ocelot
  pinctrl: at91-pio4: fix domain name assignment
  pinctrl: mediatek: fix naming inconsistency
  pinctrl: mediatek: add missing options to PINCTRL_MT7981
parents ce0c2375 e4056e38

Documentation/devicetree/bindings/pinctrl/qcom,sm8550-lpass-lpi-pinctrl.yaml

+2 −0
Original line number Diff line number Diff line
@@ -96,9 +96,11 @@ $defs: 
          2: Lower Slew rate (slower edges)

          3: Reserved (No adjustments)



      bias-bus-hold: true

      bias-pull-down: true

      bias-pull-up: true

      bias-disable: true

      input-enable: true

      output-high: true

      output-low: true

drivers/pinctrl/mediatek/Kconfig

+23 −21
Original line number Diff line number Diff line
@@ -45,35 +45,35 @@ config PINCTRL_MTK_PARIS 


# For ARMv7 SoCs

config PINCTRL_MT2701

	bool "Mediatek MT2701 pin control"

	bool "MediaTek MT2701 pin control"

	depends on MACH_MT7623 || MACH_MT2701 || COMPILE_TEST

	depends on OF

	default MACH_MT2701

	select PINCTRL_MTK



config PINCTRL_MT7623

	bool "Mediatek MT7623 pin control with generic binding"

	bool "MediaTek MT7623 pin control with generic binding"

	depends on MACH_MT7623 || COMPILE_TEST

	depends on OF

	default MACH_MT7623

	select PINCTRL_MTK_MOORE



config PINCTRL_MT7629

	bool "Mediatek MT7629 pin control"

	bool "MediaTek MT7629 pin control"

	depends on MACH_MT7629 || COMPILE_TEST

	depends on OF

	default MACH_MT7629

	select PINCTRL_MTK_MOORE



config PINCTRL_MT8135

	bool "Mediatek MT8135 pin control"

	bool "MediaTek MT8135 pin control"

	depends on MACH_MT8135 || COMPILE_TEST

	depends on OF

	default MACH_MT8135

	select PINCTRL_MTK



config PINCTRL_MT8127

	bool "Mediatek MT8127 pin control"

	bool "MediaTek MT8127 pin control"

	depends on MACH_MT8127 || COMPILE_TEST

	depends on OF

	default MACH_MT8127
@@ -88,33 +88,33 @@ config PINCTRL_MT2712 
	select PINCTRL_MTK



config PINCTRL_MT6765

	tristate "Mediatek MT6765 pin control"

	tristate "MediaTek MT6765 pin control"

	depends on OF

	depends on ARM64 || COMPILE_TEST

	default ARM64 && ARCH_MEDIATEK

	select PINCTRL_MTK_PARIS



config PINCTRL_MT6779

	tristate "Mediatek MT6779 pin control"

	tristate "MediaTek MT6779 pin control"

	depends on OF

	depends on ARM64 || COMPILE_TEST

	default ARM64 && ARCH_MEDIATEK

	select PINCTRL_MTK_PARIS

	help

	  Say yes here to support pin controller and gpio driver

	  on Mediatek MT6779 SoC.

	  on MediaTek MT6779 SoC.

	  In MTK platform, we support virtual gpio and use it to

	  map specific eint which doesn't have real gpio pin.



config PINCTRL_MT6795

	bool "Mediatek MT6795 pin control"

	bool "MediaTek MT6795 pin control"

	depends on OF

	depends on ARM64 || COMPILE_TEST

	default ARM64 && ARCH_MEDIATEK

	select PINCTRL_MTK_PARIS



config PINCTRL_MT6797

	bool "Mediatek MT6797 pin control"

	bool "MediaTek MT6797 pin control"

	depends on OF

	depends on ARM64 || COMPILE_TEST

	default ARM64 && ARCH_MEDIATEK
@@ -128,40 +128,42 @@ config PINCTRL_MT7622 
	select PINCTRL_MTK_MOORE



config PINCTRL_MT7981

	bool "Mediatek MT7981 pin control"

	bool "MediaTek MT7981 pin control"

	depends on OF

	depends on ARM64 || COMPILE_TEST

	default ARM64 && ARCH_MEDIATEK

	select PINCTRL_MTK_MOORE



config PINCTRL_MT7986

	bool "Mediatek MT7986 pin control"

	bool "MediaTek MT7986 pin control"

	depends on OF

	depends on ARM64 || COMPILE_TEST

	default ARM64 && ARCH_MEDIATEK

	select PINCTRL_MTK_MOORE



config PINCTRL_MT8167

	bool "Mediatek MT8167 pin control"

	bool "MediaTek MT8167 pin control"

	depends on OF

	depends on ARM64 || COMPILE_TEST

	default ARM64 && ARCH_MEDIATEK

	select PINCTRL_MTK



config PINCTRL_MT8173

	bool "Mediatek MT8173 pin control"

	bool "MediaTek MT8173 pin control"

	depends on OF

	depends on ARM64 || COMPILE_TEST

	default ARM64 && ARCH_MEDIATEK

	select PINCTRL_MTK



config PINCTRL_MT8183

	bool "Mediatek MT8183 pin control"

	bool "MediaTek MT8183 pin control"

	depends on OF

	depends on ARM64 || COMPILE_TEST

	default ARM64 && ARCH_MEDIATEK

	select PINCTRL_MTK_PARIS



config PINCTRL_MT8186

	bool "Mediatek MT8186 pin control"

	bool "MediaTek MT8186 pin control"

	depends on OF

	depends on ARM64 || COMPILE_TEST

	default ARM64 && ARCH_MEDIATEK
@@ -180,28 +182,28 @@ config PINCTRL_MT8188 
	  map specific eint which doesn't have real gpio pin.



config PINCTRL_MT8192

	bool "Mediatek MT8192 pin control"

	bool "MediaTek MT8192 pin control"

	depends on OF

	depends on ARM64 || COMPILE_TEST

	default ARM64 && ARCH_MEDIATEK

	select PINCTRL_MTK_PARIS



config PINCTRL_MT8195

	bool "Mediatek MT8195 pin control"

	bool "MediaTek MT8195 pin control"

	depends on OF

	depends on ARM64 || COMPILE_TEST

	default ARM64 && ARCH_MEDIATEK

	select PINCTRL_MTK_PARIS



config PINCTRL_MT8365

	bool "Mediatek MT8365 pin control"

	bool "MediaTek MT8365 pin control"

	depends on OF

	depends on ARM64 || COMPILE_TEST

	default ARM64 && ARCH_MEDIATEK

	select PINCTRL_MTK



config PINCTRL_MT8516

	bool "Mediatek MT8516 pin control"

	bool "MediaTek MT8516 pin control"

	depends on OF

	depends on ARM64 || COMPILE_TEST

	default ARM64 && ARCH_MEDIATEK
@@ -209,7 +211,7 @@ config PINCTRL_MT8516 


# For PMIC

config PINCTRL_MT6397

	bool "Mediatek MT6397 pin control"

	bool "MediaTek MT6397 pin control"

	depends on MFD_MT6397 || COMPILE_TEST

	depends on OF

	default MFD_MT6397

drivers/pinctrl/pinctrl-amd.c

+20 −16
Original line number Diff line number Diff line
@@ -872,32 +872,34 @@ static const struct pinconf_ops amd_pinconf_ops = { 
	.pin_config_group_set = amd_pinconf_group_set,

};



static void amd_gpio_irq_init(struct amd_gpio *gpio_dev)

static void amd_gpio_irq_init_pin(struct amd_gpio *gpio_dev, int pin)

{

	struct pinctrl_desc *desc = gpio_dev->pctrl->desc;

	const struct pin_desc *pd;

	unsigned long flags;

	u32 pin_reg, mask;

	int i;



	mask = BIT(WAKE_CNTRL_OFF_S0I3) | BIT(WAKE_CNTRL_OFF_S3) |

		BIT(INTERRUPT_MASK_OFF) | BIT(INTERRUPT_ENABLE_OFF) |

		BIT(WAKE_CNTRL_OFF_S4);



	for (i = 0; i < desc->npins; i++) {

		int pin = desc->pins[i].number;

		const struct pin_desc *pd = pin_desc_get(gpio_dev->pctrl, pin);



	pd = pin_desc_get(gpio_dev->pctrl, pin);

	if (!pd)

			continue;

		return;



	raw_spin_lock_irqsave(&gpio_dev->lock, flags);



		pin_reg = readl(gpio_dev->base + i * 4);

	pin_reg = readl(gpio_dev->base + pin * 4);

	pin_reg &= ~mask;

		writel(pin_reg, gpio_dev->base + i * 4);



	writel(pin_reg, gpio_dev->base + pin * 4);

	raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);

}



static void amd_gpio_irq_init(struct amd_gpio *gpio_dev)

{

	struct pinctrl_desc *desc = gpio_dev->pctrl->desc;

	int i;



	for (i = 0; i < desc->npins; i++)

		amd_gpio_irq_init_pin(gpio_dev, i);

}



#ifdef CONFIG_PM_SLEEP
@@ -950,8 +952,10 @@ static int amd_gpio_resume(struct device *dev) 
	for (i = 0; i < desc->npins; i++) {

		int pin = desc->pins[i].number;



		if (!amd_gpio_should_save(gpio_dev, pin))

		if (!amd_gpio_should_save(gpio_dev, pin)) {

			amd_gpio_irq_init_pin(gpio_dev, pin);

			continue;

		}



		raw_spin_lock_irqsave(&gpio_dev->lock, flags);

		gpio_dev->saved_regs[i] |= readl(gpio_dev->base + pin * 4) & PIN_IRQ_PENDING;

drivers/pinctrl/pinctrl-at91-pio4.c

+0 −1
Original line number Diff line number Diff line
@@ -1206,7 +1206,6 @@ static int atmel_pinctrl_probe(struct platform_device *pdev) 
		dev_err(dev, "can't add the irq domain\n");

		return -ENODEV;

	}

	atmel_pioctrl->irq_domain->name = "atmel gpio";



	for (i = 0; i < atmel_pioctrl->npins; i++) {

		int irq = irq_create_mapping(atmel_pioctrl->irq_domain, i);

drivers/pinctrl/pinctrl-ocelot.c

+1 −1
Original line number Diff line number Diff line
@@ -1204,7 +1204,7 @@ static int ocelot_pinmux_set_mux(struct pinctrl_dev *pctldev, 
	regmap_update_bits(info->map, REG_ALT(0, info, pin->pin),

			   BIT(p), f << p);

	regmap_update_bits(info->map, REG_ALT(1, info, pin->pin),

			   BIT(p), f << (p - 1));

			   BIT(p), (f >> 1) << p);



	return 0;

}