Commit 93e28cf8 authored by Joaquín Ignacio Aramendía's avatar Joaquín Ignacio Aramendía Committed by Alex Deucher
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drm/amd/display: Revert logic for plane modifiers

This file was split in commit 5d945cbc
("drm/amd/display: Create a file dedicated to planes") and the logic in
dm_plane_format_mod_supported() function got changed by a switch logic.
That change broke drm_plane modifiers setting on series 5000 APUs
(tested on OXP mini AMD 5800U and HP Dev One 5850U PRO)
leading to Gamescope not working as reported on GitHub[1]

To reproduce the issue, enter a TTY and run:

$ gamescope -- vkcube

With said commit applied it will abort. This one restores the old logic,
fixing the issue that affects Gamescope.

[1](https://github.com/Plagman/gamescope/issues/624

)

Cc: <stable@vger.kernel.org> # 6.0.x
Signed-off-by: default avatarJoaquín Ignacio Aramendía <samsagax@gmail.com>
Reviewed-by: default avatarBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 31bc2485
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+7 −43
Original line number Diff line number Diff line
@@ -1369,7 +1369,7 @@ static bool dm_plane_format_mod_supported(struct drm_plane *plane,
{
	struct amdgpu_device *adev = drm_to_adev(plane->dev);
	const struct drm_format_info *info = drm_format_info(format);
	struct hw_asic_id asic_id = adev->dm.dc->ctx->asic_id;
	int i;

	enum dm_micro_swizzle microtile = modifier_gfx9_swizzle_mode(modifier) & 3;

@@ -1386,49 +1386,13 @@ static bool dm_plane_format_mod_supported(struct drm_plane *plane,
		return true;
	}

	/* check if swizzle mode is supported by this version of DCN */
	switch (asic_id.chip_family) {
	case FAMILY_SI:
	case FAMILY_CI:
	case FAMILY_KV:
	case FAMILY_CZ:
	case FAMILY_VI:
		/* asics before AI does not have modifier support */
		return false;
	case FAMILY_AI:
	case FAMILY_RV:
	case FAMILY_NV:
	case FAMILY_VGH:
	case FAMILY_YELLOW_CARP:
	case AMDGPU_FAMILY_GC_10_3_6:
	case AMDGPU_FAMILY_GC_10_3_7:
		switch (AMD_FMT_MOD_GET(TILE, modifier)) {
		case AMD_FMT_MOD_TILE_GFX9_64K_R_X:
		case AMD_FMT_MOD_TILE_GFX9_64K_D_X:
		case AMD_FMT_MOD_TILE_GFX9_64K_S_X:
		case AMD_FMT_MOD_TILE_GFX9_64K_D:
			return true;
		default:
			return false;
		}
		break;
	case AMDGPU_FAMILY_GC_11_0_0:
	case AMDGPU_FAMILY_GC_11_0_1:
		switch (AMD_FMT_MOD_GET(TILE, modifier)) {
		case AMD_FMT_MOD_TILE_GFX11_256K_R_X:
		case AMD_FMT_MOD_TILE_GFX9_64K_R_X:
		case AMD_FMT_MOD_TILE_GFX9_64K_D_X:
		case AMD_FMT_MOD_TILE_GFX9_64K_S_X:
		case AMD_FMT_MOD_TILE_GFX9_64K_D:
			return true;
		default:
			return false;
		}
		break;
	default:
		ASSERT(0); /* Unknown asic */
	/* Check that the modifier is on the list of the plane's supported modifiers. */
	for (i = 0; i < plane->modifier_count; i++) {
		if (modifier == plane->modifiers[i])
			break;
	}
	if (i == plane->modifier_count)
		return false;

	/*
	 * For D swizzle the canonical modifier depends on the bpp, so check