Commit 93cad722 authored by Likun Gao's avatar Likun Gao Committed by Alex Deucher
Browse files

drm/amdgpu/gfx9: use common function to init cp fw 



Use common function to init gfx v9 CP firmware ucode.

Signed-off-by: default avatarLikun Gao <Likun.Gao@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ec71b250

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+10 −88
Original line number Diff line number Diff line
@@ -1252,9 +1252,6 @@ static int gfx_v9_0_init_cp_gfx_microcode(struct amdgpu_device *adev, 
{

	char fw_name[30];

	int err;

	struct amdgpu_firmware_info *info = NULL;

	const struct common_firmware_header *header = NULL;

	const struct gfx_firmware_header_v1_0 *cp_hdr;



	snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_pfp.bin", chip_name);

	err = request_firmware(&adev->gfx.pfp_fw, fw_name, adev->dev);
@@ -1263,9 +1260,7 @@ static int gfx_v9_0_init_cp_gfx_microcode(struct amdgpu_device *adev, 
	err = amdgpu_ucode_validate(adev->gfx.pfp_fw);

	if (err)

		goto out;

	cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.pfp_fw->data;

	adev->gfx.pfp_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);

	adev->gfx.pfp_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);

	amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_PFP);



	snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_me.bin", chip_name);

	err = request_firmware(&adev->gfx.me_fw, fw_name, adev->dev);
@@ -1274,9 +1269,7 @@ static int gfx_v9_0_init_cp_gfx_microcode(struct amdgpu_device *adev, 
	err = amdgpu_ucode_validate(adev->gfx.me_fw);

	if (err)

		goto out;

	cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data;

	adev->gfx.me_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);

	adev->gfx.me_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);

	amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_ME);



	snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ce.bin", chip_name);

	err = request_firmware(&adev->gfx.ce_fw, fw_name, adev->dev);
@@ -1285,37 +1278,12 @@ static int gfx_v9_0_init_cp_gfx_microcode(struct amdgpu_device *adev, 
	err = amdgpu_ucode_validate(adev->gfx.ce_fw);

	if (err)

		goto out;

	cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.ce_fw->data;

	adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);

	adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);



	if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {

		info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_PFP];

		info->ucode_id = AMDGPU_UCODE_ID_CP_PFP;

		info->fw = adev->gfx.pfp_fw;

		header = (const struct common_firmware_header *)info->fw->data;

		adev->firmware.fw_size +=

			ALIGN(le32_to_cpu(header->ucode_size_bytes), PAGE_SIZE);



		info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_ME];

		info->ucode_id = AMDGPU_UCODE_ID_CP_ME;

		info->fw = adev->gfx.me_fw;

		header = (const struct common_firmware_header *)info->fw->data;

		adev->firmware.fw_size +=

			ALIGN(le32_to_cpu(header->ucode_size_bytes), PAGE_SIZE);



		info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_CE];

		info->ucode_id = AMDGPU_UCODE_ID_CP_CE;

		info->fw = adev->gfx.ce_fw;

		header = (const struct common_firmware_header *)info->fw->data;

		adev->firmware.fw_size +=

			ALIGN(le32_to_cpu(header->ucode_size_bytes), PAGE_SIZE);

	}

	amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_CE);



out:

	if (err) {

		dev_err(adev->dev,

			"gfx9: Failed to load firmware \"%s\"\n",

			"gfx9: Failed to init firmware \"%s\"\n",

			fw_name);

		release_firmware(adev->gfx.pfp_fw);

		adev->gfx.pfp_fw = NULL;
@@ -1371,7 +1339,7 @@ static int gfx_v9_0_init_rlc_microcode(struct amdgpu_device *adev, 
out:

	if (err) {

		dev_err(adev->dev,

			"gfx9: Failed to load firmware \"%s\"\n",

			"gfx9: Failed to init firmware \"%s\"\n",

			fw_name);

		release_firmware(adev->gfx.rlc_fw);

		adev->gfx.rlc_fw = NULL;
@@ -1394,9 +1362,6 @@ static int gfx_v9_0_init_cp_compute_microcode(struct amdgpu_device *adev, 
{

	char fw_name[30];

	int err;

	struct amdgpu_firmware_info *info = NULL;

	const struct common_firmware_header *header = NULL;

	const struct gfx_firmware_header_v1_0 *cp_hdr;



	if (amdgpu_sriov_vf(adev) && (adev->asic_type == CHIP_ALDEBARAN))

		snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_sjt_mec.bin", chip_name);
@@ -1409,10 +1374,8 @@ static int gfx_v9_0_init_cp_compute_microcode(struct amdgpu_device *adev, 
	err = amdgpu_ucode_validate(adev->gfx.mec_fw);

	if (err)

		goto out;

	cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data;

	adev->gfx.mec_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);

	adev->gfx.mec_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);



	amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC1);

	amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC1_JT);



	if (gfx_v9_0_load_mec2_fw_bin_support(adev)) {

		if (amdgpu_sriov_vf(adev) && (adev->asic_type == CHIP_ALDEBARAN))
@@ -1425,12 +1388,8 @@ static int gfx_v9_0_init_cp_compute_microcode(struct amdgpu_device *adev, 
			err = amdgpu_ucode_validate(adev->gfx.mec2_fw);

			if (err)

				goto out;

			cp_hdr = (const struct gfx_firmware_header_v1_0 *)

			adev->gfx.mec2_fw->data;

			adev->gfx.mec2_fw_version =

			le32_to_cpu(cp_hdr->header.ucode_version);

			adev->gfx.mec2_feature_version =

			le32_to_cpu(cp_hdr->ucode_feature_version);

			amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC2);

			amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC2_JT);

		} else {

			err = 0;

			adev->gfx.mec2_fw = NULL;
@@ -1440,49 +1399,12 @@ static int gfx_v9_0_init_cp_compute_microcode(struct amdgpu_device *adev, 
		adev->gfx.mec2_feature_version = adev->gfx.mec_feature_version;

	}



	if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {

		info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_MEC1];

		info->ucode_id = AMDGPU_UCODE_ID_CP_MEC1;

		info->fw = adev->gfx.mec_fw;

		header = (const struct common_firmware_header *)info->fw->data;

		cp_hdr = (const struct gfx_firmware_header_v1_0 *)info->fw->data;

		adev->firmware.fw_size +=

			ALIGN(le32_to_cpu(header->ucode_size_bytes) - le32_to_cpu(cp_hdr->jt_size) * 4, PAGE_SIZE);



		info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_MEC1_JT];

		info->ucode_id = AMDGPU_UCODE_ID_CP_MEC1_JT;

		info->fw = adev->gfx.mec_fw;

		adev->firmware.fw_size +=

			ALIGN(le32_to_cpu(cp_hdr->jt_size) * 4, PAGE_SIZE);



		if (adev->gfx.mec2_fw) {

			info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_MEC2];

			info->ucode_id = AMDGPU_UCODE_ID_CP_MEC2;

			info->fw = adev->gfx.mec2_fw;

			header = (const struct common_firmware_header *)info->fw->data;

			cp_hdr = (const struct gfx_firmware_header_v1_0 *)info->fw->data;

			adev->firmware.fw_size +=

				ALIGN(le32_to_cpu(header->ucode_size_bytes) - le32_to_cpu(cp_hdr->jt_size) * 4, PAGE_SIZE);



			/* TODO: Determine if MEC2 JT FW loading can be removed

				 for all GFX V9 asic and above */

			if (gfx_v9_0_load_mec2_fw_bin_support(adev)) {

				info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_MEC2_JT];

				info->ucode_id = AMDGPU_UCODE_ID_CP_MEC2_JT;

				info->fw = adev->gfx.mec2_fw;

				adev->firmware.fw_size +=

					ALIGN(le32_to_cpu(cp_hdr->jt_size) * 4,

					PAGE_SIZE);

			}

		}

	}



out:

	gfx_v9_0_check_if_need_gfxoff(adev);

	gfx_v9_0_check_fw_write_wait(adev);

	if (err) {

		dev_err(adev->dev,

			"gfx9: Failed to load firmware \"%s\"\n",

			"gfx9: Failed to init firmware \"%s\"\n",

			fw_name);

		release_firmware(adev->gfx.mec_fw);

		adev->gfx.mec_fw = NULL;