Commit 93ad700d authored by Vineet Gupta's avatar Vineet Gupta
Browse files

ARC: Fold boards sub-menu into platform/SoC menu 



This is more natural and is now doable since the choice constructs are
gone.

Signed-off-by: default avatarVineet Gupta <vgupta@synopsys.com>
Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 53d98958

arch/arc/Kconfig

+3 −18
Original line number Diff line number Diff line
@@ -82,18 +82,11 @@ source "kernel/Kconfig.freezer" 


menu "ARC Architecture Configuration"



menu "ARC Platform/SoC"



config ARC_PLAT_FPGA_LEGACY

	bool "\"Legacy\" ARC FPGA dev platform"

	help

	  Support for ARC development platforms, provided by Synopsys.

	  These are based on FPGA or ISS. e.g.

	  - ARCAngel4

	  - ML509

	  - MetaWare ISS

menu "ARC Platform/SoC/Board"



source "arch/arc/plat-arcfpga/Kconfig"

#New platform adds here



endmenu



menu "ARC CPU Configuration"
@@ -338,12 +331,6 @@ config ARC_HAS_RTSC 


endmenu   # "ARC CPU Configuration"



menu "Platform Board Configuration"



source "arch/arc/plat-arcfpga/Kconfig"



#New platform adds here



config LINUX_LINK_BASE

	hex "Linux Link Address"

	default "0x80000000"
@@ -357,8 +344,6 @@ config LINUX_LINK_BASE 
	  Linux needs to be scooted a bit.

	  If you don't know what the above means, leave this setting alone.



endmenu # "Platform Board Configuration"



config ARC_CURR_IN_REG

	bool "Dedicate Register r25 for current_task pointer"

	default y

arch/arc/plat-arcfpga/Kconfig

+11 −5
Original line number Diff line number Diff line
@@ -6,13 +6,21 @@ 
# published by the Free Software Foundation.

#



if ARC_PLAT_FPGA_LEGACY

menuconfig ARC_PLAT_FPGA_LEGACY

	bool "\"Legacy\" ARC FPGA dev Boards"

	select ISS_SMP_EXTN if SMP

	help

	  Support for ARC development boards, provided by Synopsys.

	  These are based on FPGA or ISS. e.g.

	  - ARCAngel4

	  - ML509

	  - MetaWare ISS



menu "FPGA Board"

if ARC_PLAT_FPGA_LEGACY



config ARC_BOARD_ANGEL4

	bool "ARC Angel4"

	select ISS_SMP_EXTN if SMP

	default y

	help

	  ARC Angel4 FPGA Ref Platform (Xilinx Virtex Based)
@@ -34,8 +42,6 @@ config ISS_SMP_EXTN 
	  -XTL (To enable CPU start/stop/set-PC for another CPU)

	  It doesn't provide coherent Caches and/or Atomic Ops (LLOCK/SCOND)



endmenu



config ARC_SERIAL_BAUD

	int "UART Baud rate"

	default "115200"