Commit 935ad3a7 authored by Yifan Zhang's avatar Yifan Zhang Committed by Alex Deucher
Browse files

drm/amdgpu: add support for nbio 7.3.0 



this patch adds support for nbio 7.3.0.

Signed-off-by: default avatarYifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarHuang Rui <ray.huang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 87b5e77f

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

+1 −0
Original line number Diff line number Diff line
@@ -1822,6 +1822,7 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev) 
		break;

	case IP_VERSION(7, 2, 0):

	case IP_VERSION(7, 2, 1):

	case IP_VERSION(7, 3, 0):

	case IP_VERSION(7, 5, 0):

	case IP_VERSION(7, 5, 1):

		adev->nbio.funcs = &nbio_v7_2_funcs;

drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c

+4 −0
Original line number Diff line number Diff line
@@ -61,6 +61,7 @@ static u32 nbio_v7_2_get_rev_id(struct amdgpu_device *adev) 


	switch (adev->ip_versions[NBIO_HWIP][0]) {

	case IP_VERSION(7, 2, 1):

	case IP_VERSION(7, 3, 0):

	case IP_VERSION(7, 5, 0):

		tmp = RREG32_SOC15(NBIO, 0, regRCC_STRAP0_RCC_DEV0_EPF0_STRAP0_YC);

		break;
@@ -79,6 +80,7 @@ static void nbio_v7_2_mc_access_enable(struct amdgpu_device *adev, bool enable) 
{

	switch (adev->ip_versions[NBIO_HWIP][0]) {

	case IP_VERSION(7, 2, 1):

	case IP_VERSION(7, 3, 0):

	case IP_VERSION(7, 5, 0):

		if (enable)

			WREG32_SOC15(NBIO, 0, regBIF_BX0_BIF_FB_EN_YC,
@@ -262,6 +264,7 @@ static void nbio_v7_2_update_medium_grain_light_sleep(struct amdgpu_device *adev 


	switch (adev->ip_versions[NBIO_HWIP][0]) {

	case IP_VERSION(7, 2, 1):

	case IP_VERSION(7, 3, 0):

	case IP_VERSION(7, 5, 0):

		def = data = RREG32_PCIE_PORT(SOC15_REG_OFFSET(NBIO, 0, regPCIE_CNTL2));

		if (enable && (adev->cg_flags & AMD_CG_SUPPORT_BIF_LS))
@@ -368,6 +371,7 @@ static void nbio_v7_2_init_registers(struct amdgpu_device *adev) 
	uint32_t def, data;

	switch (adev->ip_versions[NBIO_HWIP][0]) {

	case IP_VERSION(7, 2, 1):

	case IP_VERSION(7, 3, 0):

	case IP_VERSION(7, 5, 0):

		def = data = RREG32_PCIE_PORT(SOC15_REG_OFFSET(NBIO, 0, regBIF1_PCIE_MST_CTRL_3));

		data = REG_SET_FIELD(data, BIF1_PCIE_MST_CTRL_3,