Commit 93138ef5 authored by Sai Prakash Ranjan's avatar Sai Prakash Ranjan Committed by Bjorn Andersson
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arm64: dts: qcom: sm8250: Fix level triggered PMU interrupt polarity 



As per interrupt documentation for SM8250 SoC, the polarity
for level triggered PMU interrupt is low, fix this.

Fixes: 60378f1a ("arm64: dts: qcom: sm8250: Add sm8250 dts file")
Signed-off-by: default avatarSai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/96680a1c6488955c9eef7973c28026462b2a4ec0.1613468366.git.saiprakash.ranjan@codeaurora.org


Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent 97832fa8

arch/arm64/boot/dts/qcom/sm8250.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -279,7 +279,7 @@ 


	pmu {

		compatible = "arm,armv8-pmuv3";

		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;

		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;

	};



	psci {