Commit 9312150a authored by Geetha sowjanya's avatar Geetha sowjanya Committed by David S. Miller
Browse files

octeontx2-af: cn10k: mcs: Support for stats collection 



Add mailbox messages to return the resource stats to the
caller. Stats of SecY, SC and SAs as per the macsec standard,
TCAM flow id hits/miss, mailbox to clear the stats are
implemented.

Signed-off-by: default avatarGeetha sowjanya <gakula@marvell.com>
Signed-off-by: default avatarAnkur Dwivedi <adwivedi@marvell.com>
Signed-off-by: default avatarSunil Goutham <sgoutham@marvell.com>
Signed-off-by: default avatarSubbaraya Sundeep <sbhatta@marvell.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent bd69476e

drivers/net/ethernet/marvell/octeontx2/af/mbox.h

+111 −0
Original line number Diff line number Diff line
@@ -317,6 +317,15 @@ M(MCS_PN_TABLE_WRITE, 0xa009, mcs_pn_table_write, mcs_pn_table_write_req, \ 
M(MCS_SET_ACTIVE_LMAC,	0xa00a,	mcs_set_active_lmac, mcs_set_active_lmac,	\

				msg_rsp)					\

M(MCS_GET_HW_INFO,	0xa00b,	mcs_get_hw_info, msg_req, mcs_hw_info)		\

M(MCS_GET_FLOWID_STATS, 0xa00c, mcs_get_flowid_stats, mcs_stats_req,		\

				mcs_flowid_stats)				\

M(MCS_GET_SECY_STATS,	0xa00d, mcs_get_secy_stats, mcs_stats_req,		\

				mcs_secy_stats)					\

M(MCS_GET_SC_STATS,	0xa00e, mcs_get_sc_stats, mcs_stats_req, mcs_sc_stats)	\

M(MCS_GET_SA_STATS,	0xa00f, mcs_get_sa_stats, mcs_stats_req, mcs_sa_stats)	\

M(MCS_GET_PORT_STATS,	0xa010, mcs_get_port_stats, mcs_stats_req,		\

				mcs_port_stats)					\

M(MCS_CLEAR_STATS,	0xa011,	mcs_clear_stats, mcs_clear_stats, msg_rsp)	\

M(MCS_SET_LMAC_MODE,	0xa013, mcs_set_lmac_mode, mcs_set_lmac_mode, msg_rsp)	\

M(MCS_SET_PN_THRESHOLD, 0xa014, mcs_set_pn_threshold, mcs_set_pn_threshold,	\

				msg_rsp)					\
@@ -1973,4 +1982,106 @@ struct mcs_ctrl_pkt_rule_write_req { 
	u64 rsvd;

};



struct mcs_stats_req {

	struct mbox_msghdr hdr;

	u8 id;

	u8 mcs_id;

	u8 dir;

	u64 rsvd;

};



struct mcs_flowid_stats {

	struct mbox_msghdr hdr;

	u64 tcam_hit_cnt;

	u64 rsvd;

};



struct mcs_secy_stats {

	struct mbox_msghdr hdr;

	u64 ctl_pkt_bcast_cnt;

	u64 ctl_pkt_mcast_cnt;

	u64 ctl_pkt_ucast_cnt;

	u64 ctl_octet_cnt;

	u64 unctl_pkt_bcast_cnt;

	u64 unctl_pkt_mcast_cnt;

	u64 unctl_pkt_ucast_cnt;

	u64 unctl_octet_cnt;

	/* Valid only for RX */

	u64 octet_decrypted_cnt;

	u64 octet_validated_cnt;

	u64 pkt_port_disabled_cnt;

	u64 pkt_badtag_cnt;

	u64 pkt_nosa_cnt;

	u64 pkt_nosaerror_cnt;

	u64 pkt_tagged_ctl_cnt;

	u64 pkt_untaged_cnt;

	u64 pkt_ctl_cnt;	/* CN10K-B */

	u64 pkt_notag_cnt;	/* CNF10K-B */

	/* Valid only for TX */

	u64 octet_encrypted_cnt;

	u64 octet_protected_cnt;

	u64 pkt_noactivesa_cnt;

	u64 pkt_toolong_cnt;

	u64 pkt_untagged_cnt;

	u64 rsvd[4];

};



struct mcs_port_stats {

	struct mbox_msghdr hdr;

	u64 tcam_miss_cnt;

	u64 parser_err_cnt;

	u64 preempt_err_cnt;  /* CNF10K-B */

	u64 sectag_insert_err_cnt;

	u64 rsvd[4];

};



/* Only for CN10K-B */

struct mcs_sa_stats {

	struct mbox_msghdr hdr;

	/* RX */

	u64 pkt_invalid_cnt;

	u64 pkt_nosaerror_cnt;

	u64 pkt_notvalid_cnt;

	u64 pkt_ok_cnt;

	u64 pkt_nosa_cnt;

	/* TX */

	u64 pkt_encrypt_cnt;

	u64 pkt_protected_cnt;

	u64 rsvd[4];

};



struct mcs_sc_stats {

	struct mbox_msghdr hdr;

	/* RX */

	u64 hit_cnt;

	u64 pkt_invalid_cnt;

	u64 pkt_late_cnt;

	u64 pkt_notvalid_cnt;

	u64 pkt_unchecked_cnt;

	u64 pkt_delay_cnt;	/* CNF10K-B */

	u64 pkt_ok_cnt;		/* CNF10K-B */

	u64 octet_decrypt_cnt;	/* CN10K-B */

	u64 octet_validate_cnt;	/* CN10K-B */

	/* TX */

	u64 pkt_encrypt_cnt;

	u64 pkt_protected_cnt;

	u64 octet_encrypt_cnt;		/* CN10K-B */

	u64 octet_protected_cnt;	/* CN10K-B */

	u64 rsvd[4];

};



struct mcs_clear_stats {

	struct mbox_msghdr hdr;

#define MCS_FLOWID_STATS	0

#define MCS_SECY_STATS		1

#define MCS_SC_STATS		2

#define MCS_SA_STATS		3

#define MCS_PORT_STATS		4

	u8 type;	/* FLOWID, SECY, SC, SA, PORT */

	u8 id;		/* type = PORT, If id = FF(invalid) port no is derived from pcifunc */

	u8 mcs_id;

	u8 dir;

	u8 all;		/* All resources stats mapped to PF are cleared */

};



#endif /* MBOX_H */

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

+310 −0
Original line number Diff line number Diff line
@@ -24,6 +24,311 @@ static const struct pci_device_id mcs_id_table[] = { 


static LIST_HEAD(mcs_list);



void mcs_get_tx_secy_stats(struct mcs *mcs, struct mcs_secy_stats *stats, int id)

{

	u64 reg;



	reg = MCSX_CSE_TX_MEM_SLAVE_IFOUTCTLBCPKTSX(id);

	stats->ctl_pkt_bcast_cnt = mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_TX_MEM_SLAVE_IFOUTCTLMCPKTSX(id);

	stats->ctl_pkt_mcast_cnt = mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_TX_MEM_SLAVE_IFOUTCTLOCTETSX(id);

	stats->ctl_octet_cnt = mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_TX_MEM_SLAVE_IFOUTCTLUCPKTSX(id);

	stats->ctl_pkt_ucast_cnt = mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_TX_MEM_SLAVE_IFOUTUNCTLBCPKTSX(id);

	stats->unctl_pkt_bcast_cnt = mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_TX_MEM_SLAVE_IFOUTUNCTLMCPKTSX(id);

	stats->unctl_pkt_mcast_cnt = mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_TX_MEM_SLAVE_IFOUTUNCTLOCTETSX(id);

	stats->unctl_octet_cnt = mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_TX_MEM_SLAVE_IFOUTUNCTLUCPKTSX(id);

	stats->unctl_pkt_ucast_cnt = mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_TX_MEM_SLAVE_OUTOCTETSSECYENCRYPTEDX(id);

	stats->octet_encrypted_cnt =  mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_TX_MEM_SLAVE_OUTOCTETSSECYPROTECTEDX(id);

	stats->octet_protected_cnt =  mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_TX_MEM_SLAVE_OUTPKTSSECYNOACTIVESAX(id);

	stats->pkt_noactivesa_cnt =  mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_TX_MEM_SLAVE_OUTPKTSSECYTOOLONGX(id);

	stats->pkt_toolong_cnt =  mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_TX_MEM_SLAVE_OUTPKTSSECYUNTAGGEDX(id);

	stats->pkt_untagged_cnt =  mcs_reg_read(mcs, reg);

}



void mcs_get_rx_secy_stats(struct mcs *mcs, struct mcs_secy_stats *stats, int id)

{

	u64 reg;



	reg = MCSX_CSE_RX_MEM_SLAVE_IFINCTLBCPKTSX(id);

	stats->ctl_pkt_bcast_cnt = mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_RX_MEM_SLAVE_IFINCTLMCPKTSX(id);

	stats->ctl_pkt_mcast_cnt = mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_RX_MEM_SLAVE_IFINCTLOCTETSX(id);

	stats->ctl_octet_cnt = mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_RX_MEM_SLAVE_IFINCTLUCPKTSX(id);

	stats->ctl_pkt_ucast_cnt = mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_RX_MEM_SLAVE_IFINUNCTLBCPKTSX(id);

	stats->unctl_pkt_bcast_cnt = mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_RX_MEM_SLAVE_IFINUNCTLMCPKTSX(id);

	stats->unctl_pkt_mcast_cnt = mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_RX_MEM_SLAVE_IFINUNCTLOCTETSX(id);

	stats->unctl_octet_cnt = mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_RX_MEM_SLAVE_IFINUNCTLUCPKTSX(id);

	stats->unctl_pkt_ucast_cnt = mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_RX_MEM_SLAVE_INOCTETSSECYDECRYPTEDX(id);

	stats->octet_decrypted_cnt =  mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_RX_MEM_SLAVE_INOCTETSSECYVALIDATEX(id);

	stats->octet_validated_cnt =  mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSCTRLPORTDISABLEDX(id);

	stats->pkt_port_disabled_cnt =  mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYBADTAGX(id);

	stats->pkt_badtag_cnt =  mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYNOSAX(id);

	stats->pkt_nosa_cnt = mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYNOSAERRORX(id);

	stats->pkt_nosaerror_cnt = mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYTAGGEDCTLX(id);

	stats->pkt_tagged_ctl_cnt = mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYUNTAGGEDORNOTAGX(id);

	stats->pkt_untaged_cnt = mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYCTLX(id);

	stats->pkt_ctl_cnt = mcs_reg_read(mcs, reg);



	if (mcs->hw->mcs_blks > 1) {

		reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYNOTAGX(id);

		stats->pkt_notag_cnt = mcs_reg_read(mcs, reg);

	}

}



void mcs_get_flowid_stats(struct mcs *mcs, struct mcs_flowid_stats *stats,

			  int id, int dir)

{

	u64 reg;



	if (dir == MCS_RX)

		reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSFLOWIDTCAMHITX(id);

	else

		reg = MCSX_CSE_TX_MEM_SLAVE_OUTPKTSFLOWIDTCAMHITX(id);



	stats->tcam_hit_cnt = mcs_reg_read(mcs, reg);

}



void mcs_get_port_stats(struct mcs *mcs, struct mcs_port_stats *stats,

			int id, int dir)

{

	u64 reg;



	if (dir == MCS_RX) {

		reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSFLOWIDTCAMMISSX(id);

		stats->tcam_miss_cnt = mcs_reg_read(mcs, reg);



		reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSPARSEERRX(id);

		stats->parser_err_cnt = mcs_reg_read(mcs, reg);

		if (mcs->hw->mcs_blks > 1) {

			reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSEARLYPREEMPTERRX(id);

			stats->preempt_err_cnt = mcs_reg_read(mcs, reg);

		}

	} else {

		reg = MCSX_CSE_TX_MEM_SLAVE_OUTPKTSFLOWIDTCAMMISSX(id);

		stats->tcam_miss_cnt = mcs_reg_read(mcs, reg);



		reg = MCSX_CSE_TX_MEM_SLAVE_OUTPKTSPARSEERRX(id);

		stats->parser_err_cnt = mcs_reg_read(mcs, reg);



		reg = MCSX_CSE_TX_MEM_SLAVE_OUTPKTSSECTAGINSERTIONERRX(id);

		stats->sectag_insert_err_cnt = mcs_reg_read(mcs, reg);

	}

}



void mcs_get_sa_stats(struct mcs *mcs, struct mcs_sa_stats *stats, int id, int dir)

{

	u64 reg;



	if (dir == MCS_RX) {

		reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSAINVALIDX(id);

		stats->pkt_invalid_cnt = mcs_reg_read(mcs, reg);



		reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSANOTUSINGSAERRORX(id);

		stats->pkt_nosaerror_cnt = mcs_reg_read(mcs, reg);



		reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSANOTVALIDX(id);

		stats->pkt_notvalid_cnt = mcs_reg_read(mcs, reg);



		reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSAOKX(id);

		stats->pkt_ok_cnt = mcs_reg_read(mcs, reg);



		reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSAUNUSEDSAX(id);

		stats->pkt_nosa_cnt = mcs_reg_read(mcs, reg);

	} else {

		reg = MCSX_CSE_TX_MEM_SLAVE_OUTPKTSSAENCRYPTEDX(id);

		stats->pkt_encrypt_cnt = mcs_reg_read(mcs, reg);



		reg = MCSX_CSE_TX_MEM_SLAVE_OUTPKTSSAPROTECTEDX(id);

		stats->pkt_protected_cnt = mcs_reg_read(mcs, reg);

	}

}



void mcs_get_sc_stats(struct mcs *mcs, struct mcs_sc_stats *stats,

		      int id, int dir)

{

	u64 reg;



	if (dir == MCS_RX) {

		reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSCCAMHITX(id);

		stats->hit_cnt = mcs_reg_read(mcs, reg);



		reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSCINVALIDX(id);

		stats->pkt_invalid_cnt = mcs_reg_read(mcs, reg);



		reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSCLATEORDELAYEDX(id);

		stats->pkt_late_cnt = mcs_reg_read(mcs, reg);



		reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSCNOTVALIDX(id);

		stats->pkt_notvalid_cnt = mcs_reg_read(mcs, reg);



		reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSCUNCHECKEDOROKX(id);

		stats->pkt_unchecked_cnt = mcs_reg_read(mcs, reg);



		if (mcs->hw->mcs_blks > 1) {

			reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSCDELAYEDX(id);

			stats->pkt_delay_cnt = mcs_reg_read(mcs, reg);



			reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSCOKX(id);

			stats->pkt_ok_cnt = mcs_reg_read(mcs, reg);

		}

		if (mcs->hw->mcs_blks == 1) {

			reg = MCSX_CSE_RX_MEM_SLAVE_INOCTETSSCDECRYPTEDX(id);

			stats->octet_decrypt_cnt = mcs_reg_read(mcs, reg);



			reg = MCSX_CSE_RX_MEM_SLAVE_INOCTETSSCVALIDATEX(id);

			stats->octet_validate_cnt = mcs_reg_read(mcs, reg);

		}

	} else {

		reg = MCSX_CSE_TX_MEM_SLAVE_OUTPKTSSCENCRYPTEDX(id);

		stats->pkt_encrypt_cnt = mcs_reg_read(mcs, reg);



		reg = MCSX_CSE_TX_MEM_SLAVE_OUTPKTSSCPROTECTEDX(id);

		stats->pkt_protected_cnt = mcs_reg_read(mcs, reg);



		if (mcs->hw->mcs_blks == 1) {

			reg = MCSX_CSE_TX_MEM_SLAVE_OUTOCTETSSCENCRYPTEDX(id);

			stats->octet_encrypt_cnt = mcs_reg_read(mcs, reg);



			reg = MCSX_CSE_TX_MEM_SLAVE_OUTOCTETSSCPROTECTEDX(id);

			stats->octet_protected_cnt = mcs_reg_read(mcs, reg);

		}

	}

}



void mcs_clear_stats(struct mcs *mcs, u8 type, u8 id, int dir)

{

	struct mcs_flowid_stats flowid_st;

	struct mcs_port_stats port_st;

	struct mcs_secy_stats secy_st;

	struct mcs_sc_stats sc_st;

	struct mcs_sa_stats sa_st;

	u64 reg;



	if (dir == MCS_RX)

		reg = MCSX_CSE_RX_SLAVE_CTRL;

	else

		reg = MCSX_CSE_TX_SLAVE_CTRL;



	mcs_reg_write(mcs, reg, BIT_ULL(0));



	switch (type) {

	case MCS_FLOWID_STATS:

		mcs_get_flowid_stats(mcs, &flowid_st, id, dir);

		break;

	case MCS_SECY_STATS:

		if (dir == MCS_RX)

			mcs_get_rx_secy_stats(mcs, &secy_st, id);

		else

			mcs_get_tx_secy_stats(mcs, &secy_st, id);

		break;

	case MCS_SC_STATS:

		mcs_get_sc_stats(mcs, &sc_st, id, dir);

		break;

	case MCS_SA_STATS:

		mcs_get_sa_stats(mcs, &sa_st, id, dir);

		break;

	case MCS_PORT_STATS:

		mcs_get_port_stats(mcs, &port_st, id, dir);

		break;

	}



	mcs_reg_write(mcs, reg, 0x0);

}



int mcs_clear_all_stats(struct mcs *mcs, u16 pcifunc, int dir)

{

	struct mcs_rsrc_map *map;

	int id;



	if (dir == MCS_RX)

		map = &mcs->rx;

	else

		map = &mcs->tx;



	/* Clear FLOWID stats */

	for (id = 0; id < map->flow_ids.max; id++) {

		if (map->flowid2pf_map[id] != pcifunc)

			continue;

		mcs_clear_stats(mcs, MCS_FLOWID_STATS, id, dir);

	}



	/* Clear SECY stats */

	for (id = 0; id < map->secy.max; id++) {

		if (map->secy2pf_map[id] != pcifunc)

			continue;

		mcs_clear_stats(mcs, MCS_SECY_STATS, id, dir);

	}



	/* Clear SC stats */

	for (id = 0; id < map->secy.max; id++) {

		if (map->sc2pf_map[id] != pcifunc)

			continue;

		mcs_clear_stats(mcs, MCS_SC_STATS, id, dir);

	}



	/* Clear SA stats */

	for (id = 0; id < map->sa.max; id++) {

		if (map->sa2pf_map[id] != pcifunc)

			continue;

		mcs_clear_stats(mcs, MCS_SA_STATS, id, dir);

	}

	return 0;

}



void mcs_pn_table_write(struct mcs *mcs, u8 pn_id, u64 next_pn, u8 dir)

{

	u64 reg;
@@ -816,6 +1121,10 @@ static void mcs_global_cfg(struct mcs *mcs) 
	/* Disable external bypass */

	mcs_set_external_bypass(mcs, false);



	/* Reset TX/RX stats memory */

	mcs_reg_write(mcs, MCSX_CSE_RX_SLAVE_STATS_CLEAR, 0x1F);

	mcs_reg_write(mcs, MCSX_CSE_TX_SLAVE_STATS_CLEAR, 0x1F);



	/* Set MCS to perform standard IEEE802.1AE macsec processing */

	if (mcs->hw->mcs_blks == 1) {

		mcs_reg_write(mcs, MCSX_IP_MODE, BIT_ULL(3));
@@ -921,6 +1230,7 @@ static int mcs_probe(struct pci_dev *pdev, const struct pci_device_id *id) 
	mcs->mcs_ops->mcs_parser_cfg(mcs);



	list_add(&mcs->mcs_list, &mcs_list);

	mutex_init(&mcs->stats_lock);



	return 0;

drivers/net/ethernet/marvell/octeontx2/af/mcs.h

+13 −0
Original line number Diff line number Diff line
@@ -85,6 +85,8 @@ struct mcs { 
	u8			mcs_id;

	struct mcs_ops		*mcs_ops;

	struct list_head	mcs_list;

	/* Lock for mcs stats */

	struct mutex		stats_lock;

};



struct mcs_ops {
@@ -156,4 +158,15 @@ void cnf10kb_mcs_flowid_secy_map(struct mcs *mcs, struct secy_mem_map *map, int 
void cnf10kb_mcs_rx_sa_mem_map_write(struct mcs *mcs, struct mcs_rx_sc_sa_map *map);

void cnf10kb_mcs_parser_cfg(struct mcs *mcs);



/* Stats APIs */

void mcs_get_sc_stats(struct mcs *mcs, struct mcs_sc_stats *stats, int id, int dir);

void mcs_get_sa_stats(struct mcs *mcs, struct mcs_sa_stats *stats, int id, int dir);

void mcs_get_port_stats(struct mcs *mcs, struct mcs_port_stats *stats, int id, int dir);

void mcs_get_flowid_stats(struct mcs *mcs, struct mcs_flowid_stats *stats, int id, int dir);

void mcs_get_rx_secy_stats(struct mcs *mcs, struct mcs_secy_stats *stats, int id);

void mcs_get_tx_secy_stats(struct mcs *mcs, struct mcs_secy_stats *stats, int id);

void mcs_clear_stats(struct mcs *mcs, u8 type, u8 id, int dir);

int mcs_clear_all_stats(struct mcs *mcs, u16 pcifunc, int dir);

int mcs_set_force_clk_en(struct mcs *mcs, bool set);



#endif /* MCS_H */

drivers/net/ethernet/marvell/octeontx2/af/mcs_cnf10kb.c

+26 −0
Original line number Diff line number Diff line
@@ -118,3 +118,29 @@ void cnf10kb_mcs_rx_sa_mem_map_write(struct mcs *mcs, struct mcs_rx_sc_sa_map *m 
	reg = MCSX_CPM_RX_SLAVE_SA_MAP_MEMX((4 * map->sc_id) + map->an);

	mcs_reg_write(mcs, reg, val);

}



int mcs_set_force_clk_en(struct mcs *mcs, bool set)

{

	unsigned long timeout = jiffies + usecs_to_jiffies(2000);

	u64 val;



	val = mcs_reg_read(mcs, MCSX_MIL_GLOBAL);



	if (set) {

		val |= BIT_ULL(4);

		mcs_reg_write(mcs, MCSX_MIL_GLOBAL, val);



		/* Poll till mcsx_mil_ip_gbl_status.mcs_ip_stats_ready value is 1 */

		while (!(mcs_reg_read(mcs, MCSX_MIL_IP_GBL_STATUS) & BIT_ULL(0))) {

			if (time_after(jiffies, timeout)) {

				dev_err(mcs->dev, "MCS set force clk enable failed\n");

				break;

			}

		}

	} else {

		val &= ~BIT_ULL(4);

		mcs_reg_write(mcs, MCSX_MIL_GLOBAL, val);

	}



	return 0;

}

drivers/net/ethernet/marvell/octeontx2/af/mcs_reg.h

+435 −0

File changed.

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