Loading arch/arm/boot/dts/imx25.dtsi +26 −3 Original line number Diff line number Diff line Loading @@ -269,15 +269,38 @@ status = "disabled"; }; tsc: tsc@50030000 { compatible = "fsl,imx25-adc", "fsl,imx21-tsc"; reg = <0x50030000 0x4000>; tscadc: tscadc@50030000 { compatible = "fsl,imx25-tsadc"; reg = <0x50030000 0xc>; interrupts = <46>; clocks = <&clks 119>; clock-names = "ipg"; interrupt-controller; #interrupt-cells = <1>; #address-cells = <1>; #size-cells = <1>; status = "disabled"; adc: adc@50030800 { compatible = "fsl,imx25-gcq"; reg = <0x50030800 0x60>; interrupt-parent = <&tscadc>; interrupts = <1>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; tsc: tcq@50030400 { compatible = "fsl,imx25-tcq"; reg = <0x50030400 0x60>; interrupt-parent = <&tscadc>; interrupts = <0>; fsl,wires = <4>; status = "disabled"; }; }; ssi1: ssi@50034000 { #sound-dai-cells = <0>; compatible = "fsl,imx25-ssi", "fsl,imx21-ssi"; Loading Loading
arch/arm/boot/dts/imx25.dtsi +26 −3 Original line number Diff line number Diff line Loading @@ -269,15 +269,38 @@ status = "disabled"; }; tsc: tsc@50030000 { compatible = "fsl,imx25-adc", "fsl,imx21-tsc"; reg = <0x50030000 0x4000>; tscadc: tscadc@50030000 { compatible = "fsl,imx25-tsadc"; reg = <0x50030000 0xc>; interrupts = <46>; clocks = <&clks 119>; clock-names = "ipg"; interrupt-controller; #interrupt-cells = <1>; #address-cells = <1>; #size-cells = <1>; status = "disabled"; adc: adc@50030800 { compatible = "fsl,imx25-gcq"; reg = <0x50030800 0x60>; interrupt-parent = <&tscadc>; interrupts = <1>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; tsc: tcq@50030400 { compatible = "fsl,imx25-tcq"; reg = <0x50030400 0x60>; interrupt-parent = <&tscadc>; interrupts = <0>; fsl,wires = <4>; status = "disabled"; }; }; ssi1: ssi@50034000 { #sound-dai-cells = <0>; compatible = "fsl,imx25-ssi", "fsl,imx21-ssi"; Loading