Loading include/asm-mips/atomic.h +12 −0 Original line number Diff line number Diff line Loading @@ -250,7 +250,10 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) " subu %0, %1, %3 \n" " bltz %0, 1f \n" " sc %0, %2 \n" " .set noreorder \n" " beqzl %0, 1b \n" " subu %0, %1, %3 \n" " .set reorder \n" " sync \n" "1: \n" " .set mips0 \n" Loading @@ -266,7 +269,10 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) " subu %0, %1, %3 \n" " bltz %0, 1f \n" " sc %0, %2 \n" " .set noreorder \n" " beqz %0, 1b \n" " subu %0, %1, %3 \n" " .set reorder \n" " sync \n" "1: \n" " .set mips0 \n" Loading Loading @@ -598,7 +604,10 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) " dsubu %0, %1, %3 \n" " bltz %0, 1f \n" " scd %0, %2 \n" " .set noreorder \n" " beqzl %0, 1b \n" " dsubu %0, %1, %3 \n" " .set reorder \n" " sync \n" "1: \n" " .set mips0 \n" Loading @@ -614,7 +623,10 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) " dsubu %0, %1, %3 \n" " bltz %0, 1f \n" " scd %0, %2 \n" " .set noreorder \n" " beqz %0, 1b \n" " dsubu %0, %1, %3 \n" " .set reorder \n" " sync \n" "1: \n" " .set mips0 \n" Loading Loading
include/asm-mips/atomic.h +12 −0 Original line number Diff line number Diff line Loading @@ -250,7 +250,10 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) " subu %0, %1, %3 \n" " bltz %0, 1f \n" " sc %0, %2 \n" " .set noreorder \n" " beqzl %0, 1b \n" " subu %0, %1, %3 \n" " .set reorder \n" " sync \n" "1: \n" " .set mips0 \n" Loading @@ -266,7 +269,10 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) " subu %0, %1, %3 \n" " bltz %0, 1f \n" " sc %0, %2 \n" " .set noreorder \n" " beqz %0, 1b \n" " subu %0, %1, %3 \n" " .set reorder \n" " sync \n" "1: \n" " .set mips0 \n" Loading Loading @@ -598,7 +604,10 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) " dsubu %0, %1, %3 \n" " bltz %0, 1f \n" " scd %0, %2 \n" " .set noreorder \n" " beqzl %0, 1b \n" " dsubu %0, %1, %3 \n" " .set reorder \n" " sync \n" "1: \n" " .set mips0 \n" Loading @@ -614,7 +623,10 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) " dsubu %0, %1, %3 \n" " bltz %0, 1f \n" " scd %0, %2 \n" " .set noreorder \n" " beqz %0, 1b \n" " dsubu %0, %1, %3 \n" " .set reorder \n" " sync \n" "1: \n" " .set mips0 \n" Loading