Loading arch/xtensa/include/asm/elf.h +1 −5 Original line number Diff line number Diff line Loading @@ -86,11 +86,6 @@ typedef elf_greg_t elf_gregset_t[ELF_NGREG]; typedef unsigned int elf_fpreg_t; typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; #define ELF_CORE_COPY_REGS(_eregs, _pregs) \ xtensa_elf_core_copy_regs ((xtensa_gregset_t*)&(_eregs), _pregs); extern void xtensa_elf_core_copy_regs (xtensa_gregset_t *, struct pt_regs *); /* * This is used to ensure we don't load something for the wrong architecture. */ Loading @@ -114,6 +109,7 @@ extern void xtensa_elf_core_copy_regs (xtensa_gregset_t *, struct pt_regs *); #define ELF_ARCH EM_XTENSA #define ELF_EXEC_PAGESIZE PAGE_SIZE #define CORE_DUMP_USE_REGSET /* * This is the location that an ET_DYN program is loaded if exec'ed. Typical Loading arch/xtensa/kernel/process.c +0 −46 Original line number Diff line number Diff line Loading @@ -326,49 +326,3 @@ unsigned long get_wchan(struct task_struct *p) } while (count++ < 16); return 0; } /* * xtensa_gregset_t and 'struct pt_regs' are vastly different formats * of processor registers. Besides different ordering, * xtensa_gregset_t contains non-live register information that * 'struct pt_regs' does not. Exception handling (primarily) uses * 'struct pt_regs'. Core files and ptrace use xtensa_gregset_t. * */ void xtensa_elf_core_copy_regs (xtensa_gregset_t *elfregs, struct pt_regs *regs) { unsigned long wb, ws, wm; int live, last; wb = regs->windowbase; ws = regs->windowstart; wm = regs->wmask; ws = ((ws >> wb) | (ws << (WSBITS - wb))) & ((1 << WSBITS) - 1); /* Don't leak any random bits. */ memset(elfregs, 0, sizeof(*elfregs)); /* Note: PS.EXCM is not set while user task is running; its * being set in regs->ps is for exception handling convenience. */ elfregs->pc = regs->pc; elfregs->ps = (regs->ps & ~(1 << PS_EXCM_BIT)); elfregs->lbeg = regs->lbeg; elfregs->lend = regs->lend; elfregs->lcount = regs->lcount; elfregs->sar = regs->sar; elfregs->windowstart = ws; live = (wm & 2) ? 4 : (wm & 4) ? 8 : (wm & 8) ? 12 : 16; last = XCHAL_NUM_AREGS - (wm >> 4) * 4; memcpy(elfregs->a, regs->areg, live * 4); memcpy(elfregs->a + last, regs->areg + last, (wm >> 4) * 16); } int dump_fpu(void) { return 0; } Loading
arch/xtensa/include/asm/elf.h +1 −5 Original line number Diff line number Diff line Loading @@ -86,11 +86,6 @@ typedef elf_greg_t elf_gregset_t[ELF_NGREG]; typedef unsigned int elf_fpreg_t; typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; #define ELF_CORE_COPY_REGS(_eregs, _pregs) \ xtensa_elf_core_copy_regs ((xtensa_gregset_t*)&(_eregs), _pregs); extern void xtensa_elf_core_copy_regs (xtensa_gregset_t *, struct pt_regs *); /* * This is used to ensure we don't load something for the wrong architecture. */ Loading @@ -114,6 +109,7 @@ extern void xtensa_elf_core_copy_regs (xtensa_gregset_t *, struct pt_regs *); #define ELF_ARCH EM_XTENSA #define ELF_EXEC_PAGESIZE PAGE_SIZE #define CORE_DUMP_USE_REGSET /* * This is the location that an ET_DYN program is loaded if exec'ed. Typical Loading
arch/xtensa/kernel/process.c +0 −46 Original line number Diff line number Diff line Loading @@ -326,49 +326,3 @@ unsigned long get_wchan(struct task_struct *p) } while (count++ < 16); return 0; } /* * xtensa_gregset_t and 'struct pt_regs' are vastly different formats * of processor registers. Besides different ordering, * xtensa_gregset_t contains non-live register information that * 'struct pt_regs' does not. Exception handling (primarily) uses * 'struct pt_regs'. Core files and ptrace use xtensa_gregset_t. * */ void xtensa_elf_core_copy_regs (xtensa_gregset_t *elfregs, struct pt_regs *regs) { unsigned long wb, ws, wm; int live, last; wb = regs->windowbase; ws = regs->windowstart; wm = regs->wmask; ws = ((ws >> wb) | (ws << (WSBITS - wb))) & ((1 << WSBITS) - 1); /* Don't leak any random bits. */ memset(elfregs, 0, sizeof(*elfregs)); /* Note: PS.EXCM is not set while user task is running; its * being set in regs->ps is for exception handling convenience. */ elfregs->pc = regs->pc; elfregs->ps = (regs->ps & ~(1 << PS_EXCM_BIT)); elfregs->lbeg = regs->lbeg; elfregs->lend = regs->lend; elfregs->lcount = regs->lcount; elfregs->sar = regs->sar; elfregs->windowstart = ws; live = (wm & 2) ? 4 : (wm & 4) ? 8 : (wm & 8) ? 12 : 16; last = XCHAL_NUM_AREGS - (wm >> 4) * 4; memcpy(elfregs->a, regs->areg, live * 4); memcpy(elfregs->a + last, regs->areg + last, (wm >> 4) * 16); } int dump_fpu(void) { return 0; }