Commit 920d8d2c authored by Dan Williams's avatar Dan Williams
Browse files

cxl/port: Limit the port driver to just the HDM Decoder Capability 



Update the port driver to use cxl_map_component_registers() so that the
component register block can be shared between the cxl_pci driver and
the cxl_port driver. I.e. stop the port driver from reserving the entire
component register block for itself via request_region() when it only
needs the HDM Decoder Capability subset.

Reviewed-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: default avatarDave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/166974411625.1608150.7149373371599960307.stgit@djiang5-desk3.ch.intel.com


Signed-off-by: default avatarDan Williams <dan.j.williams@intel.com>
parent 6c7f4f1e

drivers/cxl/core/hdm.c

+18 −14
Original line number Diff line number Diff line
@@ -82,18 +82,22 @@ static void parse_hdm_decoder_caps(struct cxl_hdm *cxlhdm) 
		cxlhdm->interleave_mask |= GENMASK(14, 12);

}



static void __iomem *map_hdm_decoder_regs(struct cxl_port *port,

					  void __iomem *crb)

static int map_hdm_decoder_regs(struct cxl_port *port, void __iomem *crb,

				struct cxl_component_regs *regs)

{

	struct cxl_component_reg_map map;

	struct cxl_register_map map = {

		.resource = port->component_reg_phys,

		.base = crb,

		.max_size = CXL_COMPONENT_REG_BLOCK_SIZE,

	};



	cxl_probe_component_regs(&port->dev, crb, &map);

	if (!map.hdm_decoder.valid) {

	cxl_probe_component_regs(&port->dev, crb, &map.component_map);

	if (!map.component_map.hdm_decoder.valid) {

		dev_err(&port->dev, "HDM decoder registers invalid\n");

		return IOMEM_ERR_PTR(-ENXIO);

		return -ENXIO;

	}



	return crb + map.hdm_decoder.offset;

	return cxl_map_component_regs(&port->dev, regs, &map);

}



/**
@@ -103,25 +107,25 @@ static void __iomem *map_hdm_decoder_regs(struct cxl_port *port, 
struct cxl_hdm *devm_cxl_setup_hdm(struct cxl_port *port)

{

	struct device *dev = &port->dev;

	void __iomem *crb, *hdm;

	struct cxl_hdm *cxlhdm;

	void __iomem *crb;

	int rc;



	cxlhdm = devm_kzalloc(dev, sizeof(*cxlhdm), GFP_KERNEL);

	if (!cxlhdm)

		return ERR_PTR(-ENOMEM);



	cxlhdm->port = port;

	crb = devm_cxl_iomap_block(dev, port->component_reg_phys,

				   CXL_COMPONENT_REG_BLOCK_SIZE);

	crb = ioremap(port->component_reg_phys, CXL_COMPONENT_REG_BLOCK_SIZE);

	if (!crb) {

		dev_err(dev, "No component registers mapped\n");

		return ERR_PTR(-ENXIO);

	}



	hdm = map_hdm_decoder_regs(port, crb);

	if (IS_ERR(hdm))

		return ERR_CAST(hdm);

	cxlhdm->regs.hdm_decoder = hdm;

	rc = map_hdm_decoder_regs(port, crb, &cxlhdm->regs);

	iounmap(crb);

	if (rc)

		return ERR_PTR(rc);



	parse_hdm_decoder_caps(cxlhdm);

	if (cxlhdm->decoder_count == 0) {