Unverified Commit 919977b6 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'v6.1-next-soc' of... 

Merge tag 'v6.1-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into soc/drivers

mmsys:
- add support for MT8186
- add correct compatible solution for vdosys[0,1] on MT8195

pmic wrapper:
- add support for MT8365

* tag 'v6.1-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  soc: mediatek: Add deprecated compatible to mmsys
  soc: mediatek: pwrap: add mt8365 SoC support
  soc: mediatek: pwrap: add support for sys & tmr clocks
  dt-bindings: soc: mediatek: pwrap: add MT8365 SoC bindings
  soc: mediatek: add mtk-mmsys support for mt8195 vdosys0
  Revert "soc: mediatek: add mtk-mmsys support for mt8195 vdosys0"
  dt-bindings: arm: mediatek: mmsys: change compatible for MT8195
  soc: mediatek: Add all settings to mtk_mmsys_ddp_dpi_fmt_config func

Link: https://lore.kernel.org/r/cc756001-a942-90b0-b79d-62c1fc189828@gmail.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 19e54b05 7fd731a8

Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml

+13 −1
Original line number Diff line number Diff line
@@ -32,14 +32,26 @@ properties: 
              - mediatek,mt8183-mmsys

              - mediatek,mt8186-mmsys

              - mediatek,mt8192-mmsys

              - mediatek,mt8195-mmsys

              - mediatek,mt8365-mmsys

          - const: syscon



      - description: vdosys0 and vdosys1 are 2 display HW pipelines,

                     so mt8195 binding should be deprecated.

        deprecated: true

        items:

          - const: mediatek,mt8195-mmsys

          - const: syscon



      - items:

          - const: mediatek,mt7623-mmsys

          - const: mediatek,mt2701-mmsys

          - const: syscon



      - items:

          - const: mediatek,mt8195-vdosys0

          - const: mediatek,mt8195-mmsys

          - const: syscon



  reg:

    maxItems: 1

Documentation/devicetree/bindings/soc/mediatek/pwrap.txt

+3 −0
Original line number Diff line number Diff line
@@ -30,6 +30,7 @@ Required properties in pwrap device node. 
	"mediatek,mt8186-pwrap" for MT8186 SoCs

	"mediatek,mt8188-pwrap", "mediatek,mt8195-pwrap" for MT8188 SoCs

	"mediatek,mt8195-pwrap" for MT8195 SoCs

	"mediatek,mt8365-pwrap" for MT8365 SoCs

	"mediatek,mt8516-pwrap" for MT8516 SoCs

- interrupts: IRQ for pwrap in SOC

- reg-names: "pwrap" is required; "pwrap-bridge" is optional.
@@ -39,6 +40,8 @@ Required properties in pwrap device node. 
- clock-names: Must include the following entries:

  "spi": SPI bus clock

  "wrap": Main module clock

  "sys": Optional system module clock

  "tmr": Optional timer module clock

- clocks: Must contain an entry for each entry in clock-names.



Optional properities:

drivers/soc/mediatek/mt8186-mmsys.h

+5 −3
Original line number Diff line number Diff line
@@ -5,9 +5,11 @@ 


/* Values for DPI configuration in MMSYS address space */

#define MT8186_MMSYS_DPI_OUTPUT_FORMAT		0x400

#define DPI_FORMAT_MASK					0x1

#define DPI_RGB888_DDR_CON				BIT(0)

#define DPI_RGB565_SDR_CON				BIT(1)

#define MT8186_DPI_FORMAT_MASK				GENMASK(1, 0)

#define MT8186_DPI_RGB888_SDR_CON			0

#define MT8186_DPI_RGB888_DDR_CON			1

#define MT8186_DPI_RGB565_SDR_CON			2

#define MT8186_DPI_RGB565_DDR_CON			3



#define MT8186_MMSYS_OVL_CON			0xF04

#define MT8186_MMSYS_OVL0_CON_MASK			0x3

drivers/soc/mediatek/mtk-mmsys.c

+38 −138
Original line number Diff line number Diff line
@@ -26,61 +26,26 @@ static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = { 
	.num_routes = ARRAY_SIZE(mmsys_default_routing_table),

};



static const struct mtk_mmsys_match_data mt2701_mmsys_match_data = {

	.num_drv_data = 1,

	.drv_data = {

		&mt2701_mmsys_driver_data,

	},

};



static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = {

	.clk_driver = "clk-mt2712-mm",

	.routes = mmsys_default_routing_table,

	.num_routes = ARRAY_SIZE(mmsys_default_routing_table),

};



static const struct mtk_mmsys_match_data mt2712_mmsys_match_data = {

	.num_drv_data = 1,

	.drv_data = {

		&mt2712_mmsys_driver_data,

	},

};



static const struct mtk_mmsys_driver_data mt6779_mmsys_driver_data = {

	.clk_driver = "clk-mt6779-mm",

};



static const struct mtk_mmsys_match_data mt6779_mmsys_match_data = {

	.num_drv_data = 1,

	.drv_data = {

		&mt6779_mmsys_driver_data,

	},

};



static const struct mtk_mmsys_driver_data mt6797_mmsys_driver_data = {

	.clk_driver = "clk-mt6797-mm",

};



static const struct mtk_mmsys_match_data mt6797_mmsys_match_data = {

	.num_drv_data = 1,

	.drv_data = {

		&mt6797_mmsys_driver_data,

	},

};



static const struct mtk_mmsys_driver_data mt8167_mmsys_driver_data = {

	.clk_driver = "clk-mt8167-mm",

	.routes = mt8167_mmsys_routing_table,

	.num_routes = ARRAY_SIZE(mt8167_mmsys_routing_table),

};



static const struct mtk_mmsys_match_data mt8167_mmsys_match_data = {

	.num_drv_data = 1,

	.drv_data = {

		&mt8167_mmsys_driver_data,

	},

};



static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = {

	.clk_driver = "clk-mt8173-mm",

	.routes = mmsys_default_routing_table,
@@ -88,13 +53,6 @@ static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = { 
	.sw0_rst_offset = MT8183_MMSYS_SW0_RST_B,

};



static const struct mtk_mmsys_match_data mt8173_mmsys_match_data = {

	.num_drv_data = 1,

	.drv_data = {

		&mt8173_mmsys_driver_data,

	},

};



static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data = {

	.clk_driver = "clk-mt8183-mm",

	.routes = mmsys_mt8183_routing_table,
@@ -102,13 +60,6 @@ static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data = { 
	.sw0_rst_offset = MT8183_MMSYS_SW0_RST_B,

};



static const struct mtk_mmsys_match_data mt8183_mmsys_match_data = {

	.num_drv_data = 1,

	.drv_data = {

		&mt8183_mmsys_driver_data,

	},

};



static const struct mtk_mmsys_driver_data mt8186_mmsys_driver_data = {

	.clk_driver = "clk-mt8186-mm",

	.routes = mmsys_mt8186_routing_table,
@@ -116,13 +67,6 @@ static const struct mtk_mmsys_driver_data mt8186_mmsys_driver_data = { 
	.sw0_rst_offset = MT8186_MMSYS_SW0_RST_B,

};



static const struct mtk_mmsys_match_data mt8186_mmsys_match_data = {

	.num_drv_data = 1,

	.drv_data = {

		&mt8186_mmsys_driver_data,

	},

};



static const struct mtk_mmsys_driver_data mt8192_mmsys_driver_data = {

	.clk_driver = "clk-mt8192-mm",

	.routes = mmsys_mt8192_routing_table,
@@ -130,66 +74,25 @@ static const struct mtk_mmsys_driver_data mt8192_mmsys_driver_data = { 
	.sw0_rst_offset = MT8186_MMSYS_SW0_RST_B,

};



static const struct mtk_mmsys_match_data mt8192_mmsys_match_data = {

	.num_drv_data = 1,

	.drv_data = {

		&mt8192_mmsys_driver_data,

	},

};



static const struct mtk_mmsys_driver_data mt8195_vdosys0_driver_data = {

	.io_start = 0x1c01a000,

	.clk_driver = "clk-mt8195-vdo0",

	.routes = mmsys_mt8195_routing_table,

	.num_routes = ARRAY_SIZE(mmsys_mt8195_routing_table),

};



static const struct mtk_mmsys_driver_data mt8195_vdosys1_driver_data = {

	.io_start = 0x1c100000,

	.clk_driver = "clk-mt8195-vdo1",

};



static const struct mtk_mmsys_match_data mt8195_mmsys_match_data = {

	.num_drv_data = 2,

	.drv_data = {

		&mt8195_vdosys0_driver_data,

		&mt8195_vdosys1_driver_data,

	},

};



static const struct mtk_mmsys_driver_data mt8365_mmsys_driver_data = {

	.clk_driver = "clk-mt8365-mm",

	.routes = mt8365_mmsys_routing_table,

	.num_routes = ARRAY_SIZE(mt8365_mmsys_routing_table),

};



static const struct mtk_mmsys_match_data mt8365_mmsys_match_data = {

	.num_drv_data = 1,

	.drv_data = {

		&mt8365_mmsys_driver_data,

	},

};



struct mtk_mmsys {

	void __iomem *regs;

	const struct mtk_mmsys_driver_data *data;

	spinlock_t lock; /* protects mmsys_sw_rst_b reg */

	struct reset_controller_dev rcdev;

	phys_addr_t io_start;

};



static int mtk_mmsys_find_match_drvdata(struct mtk_mmsys *mmsys,

					const struct mtk_mmsys_match_data *match)

{

	int i;



	for (i = 0; i < match->num_drv_data; i++)

		if (mmsys->io_start == match->drv_data[i]->io_start)

			return i;



	return -EINVAL;

}



void mtk_mmsys_ddp_connect(struct device *dev,

			   enum mtk_ddp_comp_id cur,

			   enum mtk_ddp_comp_id next)
@@ -238,12 +141,27 @@ static void mtk_mmsys_update_bits(struct mtk_mmsys *mmsys, u32 offset, u32 mask, 


void mtk_mmsys_ddp_dpi_fmt_config(struct device *dev, u32 val)

{

	if (val)

		mtk_mmsys_update_bits(dev_get_drvdata(dev), MT8186_MMSYS_DPI_OUTPUT_FORMAT,

				      DPI_RGB888_DDR_CON, DPI_FORMAT_MASK);

	else

		mtk_mmsys_update_bits(dev_get_drvdata(dev), MT8186_MMSYS_DPI_OUTPUT_FORMAT,

				      DPI_RGB565_SDR_CON, DPI_FORMAT_MASK);

	struct mtk_mmsys *mmsys = dev_get_drvdata(dev);



	switch (val) {

	case MTK_DPI_RGB888_SDR_CON:

		mtk_mmsys_update_bits(mmsys, MT8186_MMSYS_DPI_OUTPUT_FORMAT,

				      MT8186_DPI_FORMAT_MASK, MT8186_DPI_RGB888_SDR_CON);

		break;

	case MTK_DPI_RGB565_SDR_CON:

		mtk_mmsys_update_bits(mmsys, MT8186_MMSYS_DPI_OUTPUT_FORMAT,

				      MT8186_DPI_FORMAT_MASK, MT8186_DPI_RGB565_SDR_CON);

		break;

	case MTK_DPI_RGB565_DDR_CON:

		mtk_mmsys_update_bits(mmsys, MT8186_MMSYS_DPI_OUTPUT_FORMAT,

				      MT8186_DPI_FORMAT_MASK, MT8186_DPI_RGB565_DDR_CON);

		break;

	case MTK_DPI_RGB888_DDR_CON:

	default:

		mtk_mmsys_update_bits(mmsys, MT8186_MMSYS_DPI_OUTPUT_FORMAT,

				      MT8186_DPI_FORMAT_MASK, MT8186_DPI_RGB888_DDR_CON);

		break;

	}

}

EXPORT_SYMBOL_GPL(mtk_mmsys_ddp_dpi_fmt_config);
@@ -304,9 +222,7 @@ static int mtk_mmsys_probe(struct platform_device *pdev) 
	struct device *dev = &pdev->dev;

	struct platform_device *clks;

	struct platform_device *drm;

	const struct mtk_mmsys_match_data *match_data;

	struct mtk_mmsys *mmsys;

	struct resource *res;

	int ret;



	mmsys = devm_kzalloc(dev, sizeof(*mmsys), GFP_KERNEL);
@@ -332,27 +248,7 @@ static int mtk_mmsys_probe(struct platform_device *pdev) 
		return ret;

	}



	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

	if (!res) {

		dev_err(dev, "Couldn't get mmsys resource\n");

		return -EINVAL;

	}

	mmsys->io_start = res->start;



	match_data = of_device_get_match_data(dev);

	if (match_data->num_drv_data > 1) {

		/* This SoC has multiple mmsys channels */

		ret = mtk_mmsys_find_match_drvdata(mmsys, match_data);

		if (ret < 0) {

			dev_err(dev, "Couldn't get match driver data\n");

			return ret;

		}

		mmsys->data = match_data->drv_data[ret];

	} else {

		dev_dbg(dev, "Using single mmsys channel\n");

		mmsys->data = match_data->drv_data[0];

	}



	mmsys->data = of_device_get_match_data(&pdev->dev);

	platform_set_drvdata(pdev, mmsys);



	clks = platform_device_register_data(&pdev->dev, mmsys->data->clk_driver,
@@ -373,47 +269,51 @@ static int mtk_mmsys_probe(struct platform_device *pdev) 
static const struct of_device_id of_match_mtk_mmsys[] = {

	{

		.compatible = "mediatek,mt2701-mmsys",

		.data = &mt2701_mmsys_match_data,

		.data = &mt2701_mmsys_driver_data,

	},

	{

		.compatible = "mediatek,mt2712-mmsys",

		.data = &mt2712_mmsys_match_data,

		.data = &mt2712_mmsys_driver_data,

	},

	{

		.compatible = "mediatek,mt6779-mmsys",

		.data = &mt6779_mmsys_match_data,

		.data = &mt6779_mmsys_driver_data,

	},

	{

		.compatible = "mediatek,mt6797-mmsys",

		.data = &mt6797_mmsys_match_data,

		.data = &mt6797_mmsys_driver_data,

	},

	{

		.compatible = "mediatek,mt8167-mmsys",

		.data = &mt8167_mmsys_match_data,

		.data = &mt8167_mmsys_driver_data,

	},

	{

		.compatible = "mediatek,mt8173-mmsys",

		.data = &mt8173_mmsys_match_data,

		.data = &mt8173_mmsys_driver_data,

	},

	{

		.compatible = "mediatek,mt8183-mmsys",

		.data = &mt8183_mmsys_match_data,

		.data = &mt8183_mmsys_driver_data,

	},

	{

		.compatible = "mediatek,mt8186-mmsys",

		.data = &mt8186_mmsys_match_data,

		.data = &mt8186_mmsys_driver_data,

	},

	{

		.compatible = "mediatek,mt8192-mmsys",

		.data = &mt8192_mmsys_match_data,

		.data = &mt8192_mmsys_driver_data,

	},

	{

	{	/* deprecated compatible */

		.compatible = "mediatek,mt8195-mmsys",

		.data = &mt8195_mmsys_match_data,

		.data = &mt8195_vdosys0_driver_data,

	},

	{

		.compatible = "mediatek,mt8195-vdosys0",

		.data = &mt8195_vdosys0_driver_data,

	},

	{

		.compatible = "mediatek,mt8365-mmsys",

		.data = &mt8365_mmsys_match_data,

		.data = &mt8365_mmsys_driver_data,

	},

	{ }

};

drivers/soc/mediatek/mtk-mmsys.h

+0 −6
Original line number Diff line number Diff line
@@ -87,18 +87,12 @@ struct mtk_mmsys_routes { 
};



struct mtk_mmsys_driver_data {

	const resource_size_t io_start;

	const char *clk_driver;

	const struct mtk_mmsys_routes *routes;

	const unsigned int num_routes;

	const u16 sw0_rst_offset;

};



struct mtk_mmsys_match_data {

	unsigned short num_drv_data;

	const struct mtk_mmsys_driver_data *drv_data[];

};



/*

 * Routes in mt8173, mt2701, mt2712 are different. That means

 * in the same register address, it controls different input/output