Commit 918aed7a authored by Sam Shih's avatar Sam Shih Committed by Matthias Brugger
Browse files

arm64: dts: mt7986: add pcie related device nodes 



This patch adds PCIe support for MT7986.

Signed-off-by: default avatarJieyy Yang <jieyy.yang@mediatek.com>
Signed-off-by: default avatarSam Shih <sam.shih@mediatek.com>
Signed-off-by: default avatarFrank Wunderlich <frank-w@public-files.de>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230106152845.88717-5-linux@fw-web.de


Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent 513b49d1

arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts

+16 −0
Original line number Diff line number Diff line
@@ -93,6 +93,15 @@ 
	non-removable;

	no-sd;

	no-sdio;

};



&pcie {

	pinctrl-names = "default";

	pinctrl-0 = <&pcie_pins>;

	status = "okay";

};



&pcie_phy {

	status = "okay";

};
@@ -155,6 +164,13 @@ 
		};

	};



	pcie_pins: pcie-pins {

		mux {

			function = "pcie";

			groups = "pcie_clk", "pcie_wake", "pcie_pereset";

		};

	};



	spi_flash_pins: spi-flash-pins {

		mux {

			function = "spi";

arch/arm64/boot/dts/mediatek/mt7986a.dtsi

+52 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ 
#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/clock/mt7986-clk.h>

#include <dt-bindings/reset/mt7986-resets.h>

#include <dt-bindings/phy/phy.h>



/ {

	compatible = "mediatek,mt7986a";
@@ -361,6 +362,57 @@ 
			status = "disabled";

		};



		pcie: pcie@11280000 {

			compatible = "mediatek,mt7986-pcie",

				     "mediatek,mt8192-pcie";

			device_type = "pci";

			#address-cells = <3>;

			#size-cells = <2>;

			reg = <0x00 0x11280000 0x00 0x4000>;

			reg-names = "pcie-mac";

			interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;

			bus-range = <0x00 0xff>;

			ranges = <0x82000000 0x00 0x20000000 0x00

				  0x20000000 0x00 0x10000000>;

			clocks = <&infracfg CLK_INFRA_IPCIE_PIPE_CK>,

				 <&infracfg CLK_INFRA_IPCIE_CK>,

				 <&infracfg CLK_INFRA_IPCIER_CK>,

				 <&infracfg CLK_INFRA_IPCIEB_CK>;

			clock-names = "pl_250m", "tl_26m", "peri_26m", "top_133m";

			status = "disabled";



			phys = <&pcie_port PHY_TYPE_PCIE>;

			phy-names = "pcie-phy";



			#interrupt-cells = <1>;

			interrupt-map-mask = <0 0 0 0x7>;

			interrupt-map = <0 0 0 1 &pcie_intc 0>,

					<0 0 0 2 &pcie_intc 1>,

					<0 0 0 3 &pcie_intc 2>,

					<0 0 0 4 &pcie_intc 3>;

			pcie_intc: interrupt-controller {

				#address-cells = <0>;

				#interrupt-cells = <1>;

				interrupt-controller;

			};

		};



		pcie_phy: t-phy@11c00000 {

			compatible = "mediatek,mt7986-tphy",

				     "mediatek,generic-tphy-v2";

			#address-cells = <2>;

			#size-cells = <2>;

			ranges;

			status = "disabled";



			pcie_port: pcie-phy@11c00000 {

				reg = <0 0x11c00000 0 0x20000>;

				clocks = <&clk40m>;

				clock-names = "ref";

				#phy-cells = <1>;

			};

		};



		usb_phy: t-phy@11e10000 {

			compatible = "mediatek,mt7986-tphy",

				     "mediatek,generic-tphy-v2";