Commit 917a6f0b authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-next-fixes-2021-11-09' of... 

Merge tag 'drm-intel-next-fixes-2021-11-09' of git://anongit.freedesktop.org/drm/drm-intel

 into drm-next

Couple Reverts, build fix, couple virtualization fixes,
blank screen and other display rates fixes, and more.

Four patches targeting stable in here.

Display Fixes:
- DP rates related fixes (Imre, Jani)
- A Revert on disaling dual eDP that was causing state readout problems (Jani)
- put the cdclk vtables in const data (Jani)
- Fix DVO port type for moder platforms (Ville)
- Fix blankscreen by turning DP++ TMDS output buffers on encoder->shutdown (Ville)
- CCS FBs related fixes (Imre)

GT fixes:
- Fix recursive lock in GuC submission (Matt Brost)
- Revert guc_id from i915_request tracepoint (Joonas)
- Build fix around dmabuf (Matt Auld)

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/YYsBif3HMi8GjLoU@intel.com
parents 4a390c2e ade4a1fc

drivers/gpu/drm/i915/display/g4x_hdmi.c

+1 −0
Original line number Diff line number Diff line
@@ -584,6 +584,7 @@ void g4x_hdmi_init(struct drm_i915_private *dev_priv, 
		else

			intel_encoder->enable = g4x_enable_hdmi;

	}

	intel_encoder->shutdown = intel_hdmi_encoder_shutdown;



	intel_encoder->type = INTEL_OUTPUT_HDMI;

	intel_encoder->power_domain = intel_port_to_power_domain(port);

drivers/gpu/drm/i915/display/intel_bios.c

+63 −69
Original line number Diff line number Diff line
@@ -1707,6 +1707,39 @@ static void sanitize_aux_ch(struct intel_bios_encoder_data *devdata, 
	child->aux_channel = 0;

}



static u8 dvo_port_type(u8 dvo_port)

{

	switch (dvo_port) {

	case DVO_PORT_HDMIA:

	case DVO_PORT_HDMIB:

	case DVO_PORT_HDMIC:

	case DVO_PORT_HDMID:

	case DVO_PORT_HDMIE:

	case DVO_PORT_HDMIF:

	case DVO_PORT_HDMIG:

	case DVO_PORT_HDMIH:

	case DVO_PORT_HDMII:

		return DVO_PORT_HDMIA;

	case DVO_PORT_DPA:

	case DVO_PORT_DPB:

	case DVO_PORT_DPC:

	case DVO_PORT_DPD:

	case DVO_PORT_DPE:

	case DVO_PORT_DPF:

	case DVO_PORT_DPG:

	case DVO_PORT_DPH:

	case DVO_PORT_DPI:

		return DVO_PORT_DPA;

	case DVO_PORT_MIPIA:

	case DVO_PORT_MIPIB:

	case DVO_PORT_MIPIC:

	case DVO_PORT_MIPID:

		return DVO_PORT_MIPIA;

	default:

		return dvo_port;

	}

}



static enum port __dvo_port_to_port(int n_ports, int n_dvo,

				    const int port_mapping[][3], u8 dvo_port)

{
@@ -1930,50 +1963,6 @@ static int _intel_bios_max_tmds_clock(const struct intel_bios_encoder_data *devd 
	}

}



static enum port get_edp_port(struct drm_i915_private *i915)

{

	const struct intel_bios_encoder_data *devdata;

	enum port port;



	for_each_port(port) {

		devdata = i915->vbt.ports[port];



		if (devdata && intel_bios_encoder_supports_edp(devdata))

			return port;

	}



	return PORT_NONE;

}



/*

 * FIXME: The power sequencer and backlight code currently do not support more

 * than one set registers, at least not on anything other than VLV/CHV. It will

 * clobber the registers. As a temporary workaround, gracefully prevent more

 * than one eDP from being registered.

 */

static void sanitize_dual_edp(struct intel_bios_encoder_data *devdata,

			      enum port port)

{

	struct drm_i915_private *i915 = devdata->i915;

	struct child_device_config *child = &devdata->child;

	enum port p;



	/* CHV might not clobber PPS registers. */

	if (IS_CHERRYVIEW(i915))

		return;



	p = get_edp_port(i915);

	if (p == PORT_NONE)

		return;



	drm_dbg_kms(&i915->drm, "both ports %c and %c configured as eDP, "

		    "disabling port %c eDP\n", port_name(p), port_name(port),

		    port_name(port));



	child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT;

	child->device_type &= ~DEVICE_TYPE_INTERNAL_CONNECTOR;

}



static bool is_port_valid(struct drm_i915_private *i915, enum port port)

{

	/*
@@ -2031,9 +2020,6 @@ static void parse_ddi_port(struct drm_i915_private *i915, 
		    supports_typec_usb, supports_tbt,

		    devdata->dsc != NULL);



	if (is_edp)

		sanitize_dual_edp(devdata, port);



	if (is_dvi)

		sanitize_ddc_pin(devdata, port);
@@ -2670,7 +2656,24 @@ bool intel_bios_is_port_edp(struct drm_i915_private *i915, enum port port) 
	return false;

}



static bool child_dev_is_dp_dual_mode(const struct child_device_config *child,

static bool child_dev_is_dp_dual_mode(const struct child_device_config *child)

{

	if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) !=

	    (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))

		return false;



	if (dvo_port_type(child->dvo_port) == DVO_PORT_DPA)

		return true;



	/* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */

	if (dvo_port_type(child->dvo_port) == DVO_PORT_HDMIA &&

	    child->aux_channel != 0)

		return true;



	return false;

}



bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *i915,

				     enum port port)

{

	static const struct {
@@ -2686,32 +2689,23 @@ static bool child_dev_is_dp_dual_mode(const struct child_device_config *child, 
		[PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },

		[PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },

	};

	const struct intel_bios_encoder_data *devdata;



	if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))

		return false;



	if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) !=

	    (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))

		return false;



	if (child->dvo_port == port_mapping[port].dp)

		return true;

	if (HAS_DDI(i915)) {

		const struct intel_bios_encoder_data *devdata;



	/* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */

	if (child->dvo_port == port_mapping[port].hdmi &&

	    child->aux_channel != 0)

		return true;

		devdata = intel_bios_encoder_data_lookup(i915, port);



	return false;

		return devdata && child_dev_is_dp_dual_mode(&devdata->child);

	}



bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *i915,

				     enum port port)

{

	const struct intel_bios_encoder_data *devdata;

	if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))

		return false;



	list_for_each_entry(devdata, &i915->vbt.display_devices, node) {

		if (child_dev_is_dp_dual_mode(&devdata->child, port))

		if ((devdata->child.dvo_port == port_mapping[port].dp ||

		     devdata->child.dvo_port == port_mapping[port].hdmi) &&

		    child_dev_is_dp_dual_mode(&devdata->child))

			return true;

	}

drivers/gpu/drm/i915/display/intel_cdclk.c

+22 −22
Original line number Diff line number Diff line
@@ -2885,7 +2885,7 @@ u32 intel_read_rawclk(struct drm_i915_private *dev_priv) 
	return freq;

}



static struct intel_cdclk_funcs tgl_cdclk_funcs = {

static const struct intel_cdclk_funcs tgl_cdclk_funcs = {

	.get_cdclk = bxt_get_cdclk,

	.set_cdclk = bxt_set_cdclk,

	.bw_calc_min_cdclk = skl_bw_calc_min_cdclk,
@@ -2893,7 +2893,7 @@ static struct intel_cdclk_funcs tgl_cdclk_funcs = { 
	.calc_voltage_level = tgl_calc_voltage_level,

};



static struct intel_cdclk_funcs ehl_cdclk_funcs = {

static const struct intel_cdclk_funcs ehl_cdclk_funcs = {

	.get_cdclk = bxt_get_cdclk,

	.set_cdclk = bxt_set_cdclk,

	.bw_calc_min_cdclk = skl_bw_calc_min_cdclk,
@@ -2901,7 +2901,7 @@ static struct intel_cdclk_funcs ehl_cdclk_funcs = { 
	.calc_voltage_level = ehl_calc_voltage_level,

};



static struct intel_cdclk_funcs icl_cdclk_funcs = {

static const struct intel_cdclk_funcs icl_cdclk_funcs = {

	.get_cdclk = bxt_get_cdclk,

	.set_cdclk = bxt_set_cdclk,

	.bw_calc_min_cdclk = skl_bw_calc_min_cdclk,
@@ -2909,7 +2909,7 @@ static struct intel_cdclk_funcs icl_cdclk_funcs = { 
	.calc_voltage_level = icl_calc_voltage_level,

};



static struct intel_cdclk_funcs bxt_cdclk_funcs = {

static const struct intel_cdclk_funcs bxt_cdclk_funcs = {

	.get_cdclk = bxt_get_cdclk,

	.set_cdclk = bxt_set_cdclk,

	.bw_calc_min_cdclk = skl_bw_calc_min_cdclk,
@@ -2917,54 +2917,54 @@ static struct intel_cdclk_funcs bxt_cdclk_funcs = { 
	.calc_voltage_level = bxt_calc_voltage_level,

};



static struct intel_cdclk_funcs skl_cdclk_funcs = {

static const struct intel_cdclk_funcs skl_cdclk_funcs = {

	.get_cdclk = skl_get_cdclk,

	.set_cdclk = skl_set_cdclk,

	.bw_calc_min_cdclk = skl_bw_calc_min_cdclk,

	.modeset_calc_cdclk = skl_modeset_calc_cdclk,

};



static struct intel_cdclk_funcs bdw_cdclk_funcs = {

static const struct intel_cdclk_funcs bdw_cdclk_funcs = {

	.get_cdclk = bdw_get_cdclk,

	.set_cdclk = bdw_set_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = bdw_modeset_calc_cdclk,

};



static struct intel_cdclk_funcs chv_cdclk_funcs = {

static const struct intel_cdclk_funcs chv_cdclk_funcs = {

	.get_cdclk = vlv_get_cdclk,

	.set_cdclk = chv_set_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = vlv_modeset_calc_cdclk,

};



static struct intel_cdclk_funcs vlv_cdclk_funcs = {

static const struct intel_cdclk_funcs vlv_cdclk_funcs = {

	.get_cdclk = vlv_get_cdclk,

	.set_cdclk = vlv_set_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = vlv_modeset_calc_cdclk,

};



static struct intel_cdclk_funcs hsw_cdclk_funcs = {

static const struct intel_cdclk_funcs hsw_cdclk_funcs = {

	.get_cdclk = hsw_get_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = fixed_modeset_calc_cdclk,

};



/* SNB, IVB, 965G, 945G */

static struct intel_cdclk_funcs fixed_400mhz_cdclk_funcs = {

static const struct intel_cdclk_funcs fixed_400mhz_cdclk_funcs = {

	.get_cdclk = fixed_400mhz_get_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = fixed_modeset_calc_cdclk,

};



static struct intel_cdclk_funcs ilk_cdclk_funcs = {

static const struct intel_cdclk_funcs ilk_cdclk_funcs = {

	.get_cdclk = fixed_450mhz_get_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = fixed_modeset_calc_cdclk,

};



static struct intel_cdclk_funcs gm45_cdclk_funcs = {

static const struct intel_cdclk_funcs gm45_cdclk_funcs = {

	.get_cdclk = gm45_get_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = fixed_modeset_calc_cdclk,
@@ -2972,7 +2972,7 @@ static struct intel_cdclk_funcs gm45_cdclk_funcs = { 


/* G45 uses G33 */



static struct intel_cdclk_funcs i965gm_cdclk_funcs = {

static const struct intel_cdclk_funcs i965gm_cdclk_funcs = {

	.get_cdclk = i965gm_get_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = fixed_modeset_calc_cdclk,
@@ -2980,19 +2980,19 @@ static struct intel_cdclk_funcs i965gm_cdclk_funcs = { 


/* i965G uses fixed 400 */



static struct intel_cdclk_funcs pnv_cdclk_funcs = {

static const struct intel_cdclk_funcs pnv_cdclk_funcs = {

	.get_cdclk = pnv_get_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = fixed_modeset_calc_cdclk,

};



static struct intel_cdclk_funcs g33_cdclk_funcs = {

static const struct intel_cdclk_funcs g33_cdclk_funcs = {

	.get_cdclk = g33_get_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = fixed_modeset_calc_cdclk,

};



static struct intel_cdclk_funcs i945gm_cdclk_funcs = {

static const struct intel_cdclk_funcs i945gm_cdclk_funcs = {

	.get_cdclk = i945gm_get_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = fixed_modeset_calc_cdclk,
@@ -3000,37 +3000,37 @@ static struct intel_cdclk_funcs i945gm_cdclk_funcs = { 


/* i945G uses fixed 400 */



static struct intel_cdclk_funcs i915gm_cdclk_funcs = {

static const struct intel_cdclk_funcs i915gm_cdclk_funcs = {

	.get_cdclk = i915gm_get_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = fixed_modeset_calc_cdclk,

};



static struct intel_cdclk_funcs i915g_cdclk_funcs = {

static const struct intel_cdclk_funcs i915g_cdclk_funcs = {

	.get_cdclk = fixed_333mhz_get_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = fixed_modeset_calc_cdclk,

};



static struct intel_cdclk_funcs i865g_cdclk_funcs = {

static const struct intel_cdclk_funcs i865g_cdclk_funcs = {

	.get_cdclk = fixed_266mhz_get_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = fixed_modeset_calc_cdclk,

};



static struct intel_cdclk_funcs i85x_cdclk_funcs = {

static const struct intel_cdclk_funcs i85x_cdclk_funcs = {

	.get_cdclk = i85x_get_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = fixed_modeset_calc_cdclk,

};



static struct intel_cdclk_funcs i845g_cdclk_funcs = {

static const struct intel_cdclk_funcs i845g_cdclk_funcs = {

	.get_cdclk = fixed_200mhz_get_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = fixed_modeset_calc_cdclk,

};



static struct intel_cdclk_funcs i830_cdclk_funcs = {

static const struct intel_cdclk_funcs i830_cdclk_funcs = {

	.get_cdclk = fixed_133mhz_get_cdclk,

	.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,

	.modeset_calc_cdclk = fixed_modeset_calc_cdclk,

drivers/gpu/drm/i915/display/intel_ddi.c

+1 −0
Original line number Diff line number Diff line
@@ -4361,6 +4361,7 @@ static void intel_ddi_encoder_shutdown(struct intel_encoder *encoder) 
	enum phy phy = intel_port_to_phy(i915, encoder->port);



	intel_dp_encoder_shutdown(encoder);

	intel_hdmi_encoder_shutdown(encoder);



	if (!intel_phy_is_tc(i915, phy))

		return;

drivers/gpu/drm/i915/display/intel_display.c

+8 −1
Original line number Diff line number Diff line
@@ -848,9 +848,16 @@ unsigned int intel_remapped_info_size(const struct intel_remapped_info *rem_info 
	int i;



	for (i = 0 ; i < ARRAY_SIZE(rem_info->plane); i++) {

		unsigned int plane_size;



		plane_size = rem_info->plane[i].dst_stride * rem_info->plane[i].height;

		if (plane_size == 0)

			continue;



		if (rem_info->plane_alignment)

			size = ALIGN(size, rem_info->plane_alignment);

		size += rem_info->plane[i].dst_stride * rem_info->plane[i].height;



		size += plane_size;

	}



	return size;